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linux-next/arch/arm/boot/dts/imx6dl-gw54xx.dts
Thomas Gleixner fcaf20360a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
Based on 1 normalized pattern(s):

  the code contained herein is licensed under the gnu general public
  license you may obtain a copy of the gnu general public license
  version 2 or later at the following locations http www opensource
  org licenses gpl license html http www gnu org copyleft gpl html

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 161 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.383790741@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Gateworks Corporation
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-gw54xx.dtsi"
/ {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
};
&i2c3 {
adv7180: camera@20 {
compatible = "adi,adv7180";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adv7180>;
reg = <0x20>;
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
port {
adv7180_to_ipu1_csi1_mux: endpoint {
remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
bus-width = <8>;
};
};
};
};
&ipu1_csi1_from_ipu1_csi1_mux {
bus-width = <8>;
};
&ipu1_csi1_mux_from_parallel_sensor {
remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
bus-width = <8>;
};
&ipu1_csi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi1>;
};
&iomuxc {
pinctrl_adv7180: adv7180grp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
>;
};
pinctrl_ipu1_csi1: ipu1_csi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
>;
};
};