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dfc8a11738
This adds a devicetree for the ARM RealView PBA8 platform, also known as HBI-0178, "RealView Platform Baseboard for Cortex-A8" and PBX-A9 "RealView Platform Baseboard Explore for Cortex-A9" Tested in QEMU with -M realview-pb-a8, as well as with -M realview-pbx-a9 -smp cpus=2 Cc: Arnd Bergmann <arnd@arndb.de> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
179 lines
3.8 KiB
Plaintext
179 lines
3.8 KiB
Plaintext
/*
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* Copyright 2016 Linaro Ltd
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/dts-v1/;
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#include "arm-realview-pbx.dtsi"
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/ {
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model = "ARM RealView Platform Baseboard for Cortex-A8";
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compatible = "arm,realview-pba8";
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arm,hbi = <0x178>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "arm,realview-smp";
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a8";
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reg = <0>;
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};
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};
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pmu: pmu@0 {
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compatible = "arm,cortex-a8-pmu";
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interrupt-parent = <&intc>;
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interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>;
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};
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/* Primary GIC PL390 interrupt controller in the test chip */
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intc: interrupt-controller@1e000000 {
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compatible = "arm,pl390";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0x1e001000 0x1000>,
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<0x1e000000 0x100>;
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};
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};
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ðernet {
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interrupt-parent = <&intc>;
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interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
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};
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&usb {
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interrupt-parent = <&intc>;
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interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
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};
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&soc {
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compatible = "arm,realview-pba8-soc", "simple-bus";
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};
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&syscon {
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compatible = "arm,realview-pba8-syscon", "syscon", "simple-mfd";
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};
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&serial0 {
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interrupt-parent = <&intc>;
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interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
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};
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&serial1 {
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interrupt-parent = <&intc>;
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interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
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};
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&serial2 {
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interrupt-parent = <&intc>;
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interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
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};
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&serial3 {
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interrupt-parent = <&intc>;
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interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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&ssp {
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interrupt-parent = <&intc>;
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interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
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};
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&wdog0 {
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interrupt-parent = <&intc>;
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interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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&wdog1 {
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interrupt-parent = <&intc>;
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interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
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};
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&timer01 {
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interrupt-parent = <&intc>;
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interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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};
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&timer23 {
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interrupt-parent = <&intc>;
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interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio0 {
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interrupt-parent = <&intc>;
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interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio1 {
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interrupt-parent = <&intc>;
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interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
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};
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&gpio2 {
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interrupt-parent = <&intc>;
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interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
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};
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&rtc {
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interrupt-parent = <&intc>;
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interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
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};
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&timer45 {
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interrupt-parent = <&intc>;
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interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
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};
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&timer67 {
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interrupt-parent = <&intc>;
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interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
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};
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&aaci {
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interrupt-parent = <&intc>;
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
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};
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&mmc {
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interrupt-parent = <&intc>;
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interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
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<0 18 IRQ_TYPE_LEVEL_HIGH>;
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};
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&kmi0 {
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interrupt-parent = <&intc>;
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interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
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};
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&kmi1 {
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interrupt-parent = <&intc>;
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interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
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};
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&clcd {
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interrupt-parent = <&intc>;
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interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
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};
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