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8c0951afd8
Add documentation for the bindings of the high speed SPI controller found on newer bcm63xx SoCs. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
34 lines
849 B
Plaintext
34 lines
849 B
Plaintext
Binding for Broadcom BCM6328 High Speed SPI controller
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Required properties:
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- compatible: must contain of "brcm,bcm6328-hsspi".
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- reg: Base address and size of the controllers memory area.
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- interrupts: Interrupt for the SPI block.
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- clocks: phandles of the SPI clock and the PLL clock.
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- clock-names: must be "hsspi", "pll".
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- #address-cells: <1>, as required by generic SPI binding.
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- #size-cells: <0>, also as required by generic SPI binding.
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Optional properties:
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- num-cs: some controllers have less than 8 cs signals. Defaults to 8
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if absent.
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Child nodes as per the generic SPI binding.
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Example:
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spi@10001000 {
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupts = <29>;
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clocks = <&clkctl 9>, <&hsspi_pll>;
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clock-names = "hsspi", "pll";
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num-cs = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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