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4da722ca19
Pretty much any node can have a status property, so it doesn't need to be in examples. Converted with the following command and removed examples with SoC and board specific splits: git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d' Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
40 lines
1.2 KiB
Plaintext
40 lines
1.2 KiB
Plaintext
* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
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Required properties:
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- compatible : Should be "fsl,<soc>-gpio"
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The following <soc>s are known to be supported:
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mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
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ls1021a, ls1043a, ls2080a.
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- reg : Address and length of the register set for the device
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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Optional properties:
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- little-endian : GPIO registers are used as little endian. If not
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present registers are used as big endian by default.
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Example of gpio-controller node for a mpc5125 SoC:
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gpio0: gpio@1100 {
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compatible = "fsl,mpc5125-gpio";
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#gpio-cells = <2>;
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reg = <0x1100 0x080>;
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interrupts = <78 0x8>;
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};
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Example of gpio-controller node for a ls2080a SoC:
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gpio0: gpio@2300000 {
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compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2300000 0x0 0x10000>;
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interrupts = <0 36 0x4>; /* Level high type */
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gpio-controller;
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little-endian;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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