renegade-project/linux-next
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linux-next/arch/tile
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Yijing Wang 503275bf37 tile/PCI: use cached pci_dev->pcie_mpss to simplify code 
The PCI core caches the "PCIe Max Payload Size Supported" in
pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword().

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-09-24 12:10:04 -06:00
..
configs tile: refresh tile defconfig files 2013-09-06 13:06:30 -04:00
gxio tile: improve gxio iorpc autogenerated code style 2013-09-16 15:47:20 -04:00
include tile: <arch/> header updates from upstream 2013-09-16 15:47:26 -04:00
kernel tile/PCI: use cached pci_dev->pcie_mpss to simplify code 2013-09-24 12:10:04 -06:00
kvm arch/tile/kvm: remove depends on CONFIG_EXPERIMENTAL 2013-01-17 12:11:26 -08:00
lib tile: rework <asm/cmpxchg.h> 2013-09-06 13:06:25 -04:00
mm tile: remove HUGE_VMAP dead code 2013-09-13 11:15:24 -04:00
Kbuild arch/tile: core support for Tilera 32-bit chips. 2010-06-04 17:11:18 -04:00
Kconfig tile: double default VMALLOC space 2013-09-16 15:47:14 -04:00
Kconfig.debug tile: remove DEBUG_EXTRA_FLAGS kernel config option 2013-09-03 14:52:17 -04:00
Makefile tile: remove DEBUG_EXTRA_FLAGS kernel config option 2013-09-03 14:52:17 -04:00