mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 20:23:57 +08:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
156 lines
4.1 KiB
C
156 lines
4.1 KiB
C
/*
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* BRIEF MODULE DESCRIPTION
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* Low level uart routines to directly access a TX[34]927 SIO.
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ahennessy@mvista.com or source@mvista.com
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*
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* Based on arch/mips/ddb5xxx/ddb5477/kgdb_io.c
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*
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* Copyright (C) 2000-2001 Toshiba Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <asm/jmr3927/txx927.h>
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#include <asm/jmr3927/tx3927.h>
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#include <asm/jmr3927/jmr3927.h>
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#define TIMEOUT 0xffffff
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#define SLOW_DOWN
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static const char digits[16] = "0123456789abcdef";
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#ifdef SLOW_DOWN
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#define slow_down() { int k; for (k=0; k<10000; k++); }
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#else
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#define slow_down()
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#endif
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static int remoteDebugInitialized = 0;
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int putDebugChar(unsigned char c)
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{
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int i = 0;
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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debugInit(38400);
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}
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do {
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slow_down();
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i++;
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if (i>TIMEOUT) {
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break;
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}
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} while (!(tx3927_sioptr(0)->cisr & TXx927_SICISR_TXALS));
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tx3927_sioptr(0)->tfifo = c;
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return 1;
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}
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unsigned char getDebugChar(void)
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{
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int i = 0;
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int dicr;
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char c;
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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debugInit(38400);
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}
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/* diable RX int. */
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dicr = tx3927_sioptr(0)->dicr;
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tx3927_sioptr(0)->dicr = 0;
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do {
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slow_down();
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i++;
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if (i>TIMEOUT) {
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break;
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}
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} while (tx3927_sioptr(0)->disr & TXx927_SIDISR_UVALID)
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;
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c = tx3927_sioptr(0)->rfifo;
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/* clear RX int. status */
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tx3927_sioptr(0)->disr &= ~TXx927_SIDISR_RDIS;
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/* enable RX int. */
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tx3927_sioptr(0)->dicr = dicr;
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return c;
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}
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void debugInit(int baud)
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{
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/*
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volatile unsigned long lcr;
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volatile unsigned long dicr;
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volatile unsigned long disr;
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volatile unsigned long cisr;
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volatile unsigned long fcr;
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volatile unsigned long flcr;
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volatile unsigned long bgr;
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volatile unsigned long tfifo;
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volatile unsigned long rfifo;
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*/
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tx3927_sioptr(0)->lcr = 0x020;
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tx3927_sioptr(0)->dicr = 0;
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tx3927_sioptr(0)->disr = 0x4100;
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tx3927_sioptr(0)->cisr = 0x014;
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tx3927_sioptr(0)->fcr = 0;
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tx3927_sioptr(0)->flcr = 0x02;
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tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
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TXx927_SIBGR_BCLK_T0;
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#if 0
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/*
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* Reset the UART.
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*/
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tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST;
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while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST)
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;
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/*
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* and set the speed of the serial port
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* (currently hardwired to 9600 8N1
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*/
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tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT |
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TXx927_SILCR_USBL_1BIT |
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TXx927_SILCR_SCS_IMCLK_BG;
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tx3927_sioptr(0)->bgr =
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((JMR3927_BASE_BAUD + baud / 2) / baud) |
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TXx927_SIBGR_BCLK_T0;
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/* HW RTS/CTS control */
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if (ser->flags & ASYNC_HAVE_CTS_LINE)
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tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES |
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TXx927_SIFLCR_RTSTL_MAX /* 15 */;
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/* Enable RX/TX */
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tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE);
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#endif
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}
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