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https://github.com/edk2-porting/linux-next.git
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631dd1a885
The patch below updates broken web addresses in the kernel Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Finn Thain <fthain@telegraphics.com.au> Cc: Randy Dunlap <rdunlap@xenotime.net> Cc: Matt Turner <mattst88@gmail.com> Cc: Dimitry Torokhov <dmitry.torokhov@gmail.com> Cc: Mike Frysinger <vapier.adi@gmail.com> Acked-by: Ben Pfaff <blp@cs.stanford.edu> Acked-by: Hans J. Koch <hjk@linutronix.de> Reviewed-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
112 lines
2.7 KiB
C
112 lines
2.7 KiB
C
/*
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* Definitions for PCDP-defined console devices
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*
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* For DIG64_HCDPv10a_01.pdf and DIG64_PCDPv20.pdf (v1.0a and v2.0 resp.),
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* please see <http://www.dig64.org/specifications/>
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*
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* (c) Copyright 2002, 2004 Hewlett-Packard Development Company, L.P.
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* Khalid Aziz <khalid.aziz@hp.com>
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define PCDP_CONSOLE 0
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#define PCDP_DEBUG 1
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#define PCDP_CONSOLE_OUTPUT 2
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#define PCDP_CONSOLE_INPUT 3
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#define PCDP_UART (0 << 3)
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#define PCDP_VGA (1 << 3)
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#define PCDP_USB (2 << 3)
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/* pcdp_uart.type and pcdp_device.type */
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#define PCDP_CONSOLE_UART (PCDP_UART | PCDP_CONSOLE)
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#define PCDP_DEBUG_UART (PCDP_UART | PCDP_DEBUG)
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#define PCDP_CONSOLE_VGA (PCDP_VGA | PCDP_CONSOLE_OUTPUT)
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#define PCDP_CONSOLE_USB (PCDP_USB | PCDP_CONSOLE_INPUT)
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/* pcdp_uart.flags */
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#define PCDP_UART_EDGE_SENSITIVE (1 << 0)
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#define PCDP_UART_ACTIVE_LOW (1 << 1)
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#define PCDP_UART_PRIMARY_CONSOLE (1 << 2)
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#define PCDP_UART_IRQ (1 << 6) /* in pci_func for rev < 3 */
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#define PCDP_UART_PCI (1 << 7) /* in pci_func for rev < 3 */
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struct pcdp_uart {
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u8 type;
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u8 bits;
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u8 parity;
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u8 stop_bits;
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u8 pci_seg;
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u8 pci_bus;
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u8 pci_dev;
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u8 pci_func;
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u64 baud;
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struct acpi_generic_address addr;
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u16 pci_dev_id;
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u16 pci_vendor_id;
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u32 gsi;
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u32 clock_rate;
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u8 pci_prog_intfc;
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u8 flags;
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u16 conout_index;
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u32 reserved;
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} __attribute__((packed));
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#define PCDP_IF_PCI 1
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/* pcdp_if_pci.trans */
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#define PCDP_PCI_TRANS_IOPORT 0x02
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#define PCDP_PCI_TRANS_MMIO 0x01
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struct pcdp_if_pci {
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u8 interconnect;
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u8 reserved;
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u16 length;
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u8 segment;
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u8 bus;
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u8 dev;
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u8 fun;
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u16 dev_id;
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u16 vendor_id;
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u32 acpi_interrupt;
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u64 mmio_tra;
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u64 ioport_tra;
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u8 flags;
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u8 trans;
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} __attribute__((packed));
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struct pcdp_vga {
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u8 count; /* address space descriptors */
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} __attribute__((packed));
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/* pcdp_device.flags */
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#define PCDP_PRIMARY_CONSOLE 1
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struct pcdp_device {
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u8 type;
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u8 flags;
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u16 length;
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u16 efi_index;
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/* next data is pcdp_if_pci or pcdp_if_acpi (not yet supported) */
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/* next data is device specific type (currently only pcdp_vga) */
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} __attribute__((packed));
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struct pcdp {
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u8 signature[4];
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u32 length;
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u8 rev; /* PCDP v2.0 is rev 3 */
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u8 chksum;
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u8 oemid[6];
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u8 oem_tabid[8];
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u32 oem_rev;
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u8 creator_id[4];
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u32 creator_rev;
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u32 num_uarts;
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struct pcdp_uart uart[0]; /* actual size is num_uarts */
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/* remainder of table is pcdp_device structures */
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} __attribute__((packed));
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