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b9d8cf2eb3
Make hv_setup_sched_clock inline so the reference to pv_ops works correctly with objtool updates to detect noinstr violations. See https://lore.kernel.org/patchwork/patch/1283635/ Signed-off-by: Michael Kelley <mikelley@microsoft.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/1597022991-24088-1-git-send-email-mikelley@microsoft.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
278 lines
7.8 KiB
C
278 lines
7.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MSHYPER_H
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#define _ASM_X86_MSHYPER_H
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#include <linux/types.h>
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#include <linux/nmi.h>
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#include <linux/msi.h>
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#include <asm/io.h>
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#include <asm/hyperv-tlfs.h>
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#include <asm/nospec-branch.h>
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#include <asm/paravirt.h>
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typedef int (*hyperv_fill_flush_list_func)(
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struct hv_guest_mapping_flush_list *flush,
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void *data);
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#define hv_init_timer(timer, tick) \
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wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick)
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#define hv_init_timer_config(timer, val) \
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wrmsrl(HV_X64_MSR_STIMER0_CONFIG + (2*timer), val)
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#define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val)
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#define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val)
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#define hv_get_siefp(val) rdmsrl(HV_X64_MSR_SIEFP, val)
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#define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val)
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#define hv_get_synic_state(val) rdmsrl(HV_X64_MSR_SCONTROL, val)
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#define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val)
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#define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
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#define hv_signal_eom() wrmsrl(HV_X64_MSR_EOM, 0)
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#define hv_get_synint_state(int_num, val) \
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rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
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#define hv_set_synint_state(int_num, val) \
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wrmsrl(HV_X64_MSR_SINT0 + int_num, val)
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#define hv_recommend_using_aeoi() \
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(!(ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED))
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#define hv_get_crash_ctl(val) \
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rdmsrl(HV_X64_MSR_CRASH_CTL, val)
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#define hv_get_time_ref_count(val) \
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rdmsrl(HV_X64_MSR_TIME_REF_COUNT, val)
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#define hv_get_reference_tsc(val) \
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rdmsrl(HV_X64_MSR_REFERENCE_TSC, val)
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#define hv_set_reference_tsc(val) \
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wrmsrl(HV_X64_MSR_REFERENCE_TSC, val)
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#define hv_set_clocksource_vdso(val) \
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((val).vdso_clock_mode = VDSO_CLOCKMODE_HVCLOCK)
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#define hv_enable_vdso_clocksource() \
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vclocks_set_used(VDSO_CLOCKMODE_HVCLOCK);
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#define hv_get_raw_timer() rdtsc_ordered()
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/*
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* Reference to pv_ops must be inline so objtool
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* detection of noinstr violations can work correctly.
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*/
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static __always_inline void hv_setup_sched_clock(void *sched_clock)
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{
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#ifdef CONFIG_PARAVIRT
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pv_ops.time.sched_clock = sched_clock;
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#endif
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}
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void hyperv_vector_handler(struct pt_regs *regs);
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static inline void hv_enable_stimer0_percpu_irq(int irq) {}
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static inline void hv_disable_stimer0_percpu_irq(int irq) {}
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#if IS_ENABLED(CONFIG_HYPERV)
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extern void *hv_hypercall_pg;
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extern void __percpu **hyperv_pcpu_input_arg;
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static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
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{
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u64 input_address = input ? virt_to_phys(input) : 0;
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u64 output_address = output ? virt_to_phys(output) : 0;
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u64 hv_status;
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#ifdef CONFIG_X86_64
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input_address)
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: "r" (output_address),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory", "r8", "r9", "r10", "r11");
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#else
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u32 input_address_hi = upper_32_bits(input_address);
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u32 input_address_lo = lower_32_bits(input_address);
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u32 output_address_hi = upper_32_bits(output_address);
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u32 output_address_lo = lower_32_bits(output_address);
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if (!hv_hypercall_pg)
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return U64_MAX;
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__asm__ __volatile__(CALL_NOSPEC
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: "=A" (hv_status),
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"+c" (input_address_lo), ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input_address_hi),
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"D"(output_address_hi), "S"(output_address_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "memory");
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#endif /* !x86_64 */
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return hv_status;
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}
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/* Fast hypercall with 8 bytes of input and no output */
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static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
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{
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u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
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#ifdef CONFIG_X86_64
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{
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__asm__ __volatile__(CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo),
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ASM_CALL_CONSTRAINT
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: "A" (control),
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"b" (input1_hi),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "edi", "esi");
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}
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#endif
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return hv_status;
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}
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/* Fast hypercall with 16 bytes of input */
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static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
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{
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u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
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#ifdef CONFIG_X86_64
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{
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__asm__ __volatile__("mov %4, %%r8\n"
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CALL_NOSPEC
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (input1)
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: "r" (input2),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc", "r8", "r9", "r10", "r11");
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}
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#else
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{
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u32 input1_hi = upper_32_bits(input1);
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u32 input1_lo = lower_32_bits(input1);
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u32 input2_hi = upper_32_bits(input2);
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u32 input2_lo = lower_32_bits(input2);
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__asm__ __volatile__ (CALL_NOSPEC
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: "=A"(hv_status),
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"+c"(input1_lo), ASM_CALL_CONSTRAINT
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: "A" (control), "b" (input1_hi),
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"D"(input2_hi), "S"(input2_lo),
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THUNK_TARGET(hv_hypercall_pg)
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: "cc");
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}
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#endif
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return hv_status;
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}
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/*
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* Rep hypercalls. Callers of this functions are supposed to ensure that
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* rep_count and varhead_size comply with Hyper-V hypercall definition.
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*/
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static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 varhead_size,
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void *input, void *output)
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{
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u64 control = code;
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u64 status;
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u16 rep_comp;
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control |= (u64)varhead_size << HV_HYPERCALL_VARHEAD_OFFSET;
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control |= (u64)rep_count << HV_HYPERCALL_REP_COMP_OFFSET;
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do {
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status = hv_do_hypercall(control, input, output);
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if ((status & HV_HYPERCALL_RESULT_MASK) != HV_STATUS_SUCCESS)
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return status;
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/* Bits 32-43 of status have 'Reps completed' data. */
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rep_comp = (status & HV_HYPERCALL_REP_COMP_MASK) >>
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HV_HYPERCALL_REP_COMP_OFFSET;
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control &= ~HV_HYPERCALL_REP_START_MASK;
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control |= (u64)rep_comp << HV_HYPERCALL_REP_START_OFFSET;
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touch_nmi_watchdog();
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} while (rep_comp < rep_count);
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return status;
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}
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extern struct hv_vp_assist_page **hv_vp_assist_page;
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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if (!hv_vp_assist_page)
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return NULL;
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return hv_vp_assist_page[cpu];
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}
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void __init hyperv_init(void);
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void hyperv_setup_mmu_ops(void);
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void *hv_alloc_hyperv_page(void);
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void *hv_alloc_hyperv_zeroed_page(void);
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void hv_free_hyperv_page(unsigned long addr);
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void set_hv_tscchange_cb(void (*cb)(void));
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void clear_hv_tscchange_cb(void);
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void hyperv_stop_tsc_emulation(void);
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int hyperv_flush_guest_mapping(u64 as);
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int hyperv_flush_guest_mapping_range(u64 as,
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hyperv_fill_flush_list_func fill_func, void *data);
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int hyperv_fill_flush_guest_mapping_list(
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struct hv_guest_mapping_flush_list *flush,
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u64 start_gfn, u64 end_gfn);
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#ifdef CONFIG_X86_64
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void hv_apic_init(void);
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void __init hv_init_spinlocks(void);
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bool hv_vcpu_is_preempted(int vcpu);
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#else
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static inline void hv_apic_init(void) {}
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#endif
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static inline void hv_set_msi_entry_from_desc(union hv_msi_entry *msi_entry,
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struct msi_desc *msi_desc)
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{
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msi_entry->address = msi_desc->msg.address_lo;
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msi_entry->data = msi_desc->msg.data;
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}
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#else /* CONFIG_HYPERV */
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static inline void hyperv_init(void) {}
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static inline void hyperv_setup_mmu_ops(void) {}
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static inline void *hv_alloc_hyperv_page(void) { return NULL; }
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static inline void hv_free_hyperv_page(unsigned long addr) {}
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static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
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static inline void clear_hv_tscchange_cb(void) {}
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static inline void hyperv_stop_tsc_emulation(void) {};
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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return NULL;
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}
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static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
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static inline int hyperv_flush_guest_mapping_range(u64 as,
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hyperv_fill_flush_list_func fill_func, void *data)
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{
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return -1;
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}
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#endif /* CONFIG_HYPERV */
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#include <asm-generic/mshyperv.h>
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#endif
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