Yakir Yang bcec20fd5a drm: bridge: analogix/dp: add some rk3288 special registers setting ... RK3288 need some special registers setting, we can separate them out by the dev_type of plat_data. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>		2016-04-05 10:13:06 +08:00
..
analogix_dp_core.c	drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range	2016-04-05 10:13:02 +08:00
analogix_dp_core.h	drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range	2016-04-05 10:13:02 +08:00
analogix_dp_reg.c	drm: bridge: analogix/dp: add some rk3288 special registers setting	2016-04-05 10:13:06 +08:00
analogix_dp_reg.h	drm: bridge: analogix/dp: add some rk3288 special registers setting	2016-04-05 10:13:06 +08:00
Kconfig	drm: bridge: analogix/dp: split exynos dp driver to bridge directory	2016-04-05 10:11:48 +08:00
Makefile	drm: bridge: analogix/dp: split exynos dp driver to bridge directory	2016-04-05 10:11:48 +08:00