mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 23:23:55 +08:00
1c207f911f
The EVM consists of a system on module (SOM) and baseboard, and LCD. This patch adds a DTSI file for the SOM and baseboard separately, then a wrapper to combine them and specify processor type and a LCD information. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
366 lines
8.4 KiB
Plaintext
366 lines
8.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (C) 2019 Logic PD, Inc.
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x80000000>;
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};
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reg_wl18xx_vmmc: regulator-wl18xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1837";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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nand-on-flash-bbt;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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pfuze100: pmic@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-name = "vddcore";
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-name = "vddsoc";
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "gen_3v3";
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regulator-boot-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-name = "sw3a_vddr";
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-name = "sw3b_vddr";
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "gen_rgmii";
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-name = "gen_5v0";
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "gen_vsns";
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "gen_1v5";
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};
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vgen2_reg: vgen2 {
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regulator-name = "vgen2";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-name = "gen_vadj_0";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4_reg: vgen4 {
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regulator-name = "gen_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-name = "gen_vadj_1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-name = "gen_2v5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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coin_reg: coin {
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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};
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};
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temperature-sensor@49 {
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compatible = "ti,tmp102";
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reg = <0x49>;
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interrupt-parent = <&gpio6>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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#thermal-sensor-cells = <1>;
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};
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temperature-sensor@4a {
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compatible = "ti,tmp102";
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reg = <0x4a>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tempsense>;
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interrupt-parent = <&gpio6>;
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interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
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#thermal-sensor-cells = <1>;
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};
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eeprom@51 {
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compatible = "atmel,24c64";
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pagesize = <32>;
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read-only; /* Manufacturing EEPROM programmed at factory */
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reg = <0x51>;
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};
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eeprom@52 {
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compatible = "atmel,24c64";
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pagesize = <32>;
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reg = <0x52>;
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};
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};
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/* Reroute power feeding the CPU to come from the external PMIC */
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®_arm
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{
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vin-supply = <&sw1a_reg>;
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};
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®_soc
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{
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vin-supply = <&sw1c_reg>;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_gpmi_nand: gpmi-nandgrp {
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fsl,pins = <
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MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
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MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
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MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
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MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
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MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
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MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
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MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
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MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
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MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
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MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
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MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
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MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
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MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
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MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
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MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
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>;
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};
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pinctrl_hog: hoggrp {
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fsl,pins = < /* Enable ARM Debugger */
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MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
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MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0
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MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
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MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
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MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
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MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
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MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
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MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
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MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
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MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
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MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
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MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
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MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
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MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
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MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
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MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
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MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
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MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
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MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_tempsense: tempsensegrp {
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fsl,pins = <
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MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
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MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
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>;
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};
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};
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&snvs_poweroff {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "ti,wl1837-st";
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enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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};
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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non-removable;
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keep-power-in-suspend;
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wakeup-source;
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vmmc-supply = <&sw2_reg>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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non-removable;
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cap-power-off-card;
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keep-power-in-suspend;
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wakeup-source;
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vmmc-supply = <®_wl18xx_vmmc>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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wlcore: wlcore@2 {
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compatible = "ti,wl1837";
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reg = <2>;
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interrupt-parent = <&gpio7>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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