mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-24 05:04:00 +08:00
f79b1c573c
From Skylake onwards, the platform controller hub (Sunrisepoint PCH) does
not support legacy DMA operations to IO ports 81h-83h, 87h, 89h-8Bh, 8Fh.
Currently this driver registers as syscore ops and its resume function is
called on every resume from S3. On Skylake and Kabylake, this causes a
resume delay of around 100ms due to port IO operations, which is a problem.
This change allows to load the driver only when the platform bios
explicitly supports such devices or has a cut-off date earlier than 2017
due to the following reasons:
- The platforms released before year 2017 have support for the 8237.
(except Sunrisepoint PCH e.g. Skylake)
- Some of the BIOS that were released for platforms (Skylake, Kabylake)
during 2016-17 are buggy. These BIOS do not set/unset the
ACPI_FADT_LEGACY_DEVICES field in FADT table properly based on the
presence or absence of the DMA device.
Very recently, open source system firmware like coreboot started unsetting
ACPI_FADT_LEGACY_DEVICES field in FADT table if the 8237 DMA device is not
present on the PCH.
Please refer to chapter 21 of 6th Generation Intel® Core™ Processor
Platform Controller Hub Family: BIOS Specification.
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: rjw@rjwysocki.net
Cc: hpa@zytor.com
Cc: Alan Cox <alan@linux.intel.com>
Link: https://lkml.kernel.org/r/1522336015-22994-1-git-send-email-anshuman.gupta@intel.com
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
#include <linux/kernel.h>
|
|
#include <linux/init.h>
|
|
|
|
#include <asm/setup.h>
|
|
#include <asm/bios_ebda.h>
|
|
|
|
void __init x86_early_init_platform_quirks(void)
|
|
{
|
|
x86_platform.legacy.i8042 = X86_LEGACY_I8042_EXPECTED_PRESENT;
|
|
x86_platform.legacy.rtc = 1;
|
|
x86_platform.legacy.warm_reset = 1;
|
|
x86_platform.legacy.reserve_bios_regions = 0;
|
|
x86_platform.legacy.devices.pnpbios = 1;
|
|
|
|
switch (boot_params.hdr.hardware_subarch) {
|
|
case X86_SUBARCH_PC:
|
|
x86_platform.legacy.reserve_bios_regions = 1;
|
|
break;
|
|
case X86_SUBARCH_XEN:
|
|
x86_platform.legacy.devices.pnpbios = 0;
|
|
x86_platform.legacy.rtc = 0;
|
|
break;
|
|
case X86_SUBARCH_INTEL_MID:
|
|
case X86_SUBARCH_CE4100:
|
|
x86_platform.legacy.devices.pnpbios = 0;
|
|
x86_platform.legacy.rtc = 0;
|
|
x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
|
|
break;
|
|
}
|
|
|
|
if (x86_platform.set_legacy_features)
|
|
x86_platform.set_legacy_features();
|
|
}
|
|
|
|
bool __init x86_pnpbios_disabled(void)
|
|
{
|
|
return x86_platform.legacy.devices.pnpbios == 0;
|
|
}
|
|
|
|
#if defined(CONFIG_PNPBIOS)
|
|
bool __init arch_pnpbios_disabled(void)
|
|
{
|
|
return x86_pnpbios_disabled();
|
|
}
|
|
#endif
|