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6faaeb8ea3
This is enough to get the NMIs working, more work is needed for perf events. Signed-off-by: David S. Miller <davem@davemloft.net>
51 lines
1.8 KiB
C
51 lines
1.8 KiB
C
#ifndef __PCR_H
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#define __PCR_H
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struct pcr_ops {
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u64 (*read_pcr)(unsigned long);
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void (*write_pcr)(unsigned long, u64);
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u64 (*read_pic)(unsigned long);
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void (*write_pic)(unsigned long, u64);
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u64 (*nmi_picl_value)(unsigned int nmi_hz);
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u64 pcr_nmi_enable;
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u64 pcr_nmi_disable;
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};
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extern const struct pcr_ops *pcr_ops;
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extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
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extern void schedule_deferred_pcr_work(void);
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#define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
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#define PCR_STRACE 0x00000002 /* Trace supervisor events */
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#define PCR_UTRACE 0x00000004 /* Trace user events */
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#define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
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#define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
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#define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
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#define PCR_N2_MASK0 0x00003fc0
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#define PCR_N2_MASK0_SHIFT 6
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#define PCR_N2_SL0 0x0003c000
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#define PCR_N2_SL0_SHIFT 14
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#define PCR_N2_OV0 0x00040000
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#define PCR_N2_MASK1 0x07f80000
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#define PCR_N2_MASK1_SHIFT 19
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#define PCR_N2_SL1 0x78000000
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#define PCR_N2_SL1_SHIFT 27
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#define PCR_N2_OV1 0x80000000
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#define PCR_N4_OV 0x00000001 /* PIC overflow */
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#define PCR_N4_TOE 0x00000002 /* Trap On Event */
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#define PCR_N4_UTRACE 0x00000004 /* Trace user events */
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#define PCR_N4_STRACE 0x00000008 /* Trace supervisor events */
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#define PCR_N4_HTRACE 0x00000010 /* Trace hypervisor events */
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#define PCR_N4_MASK 0x000007e0 /* Event mask */
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#define PCR_N4_MASK_SHIFT 5
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#define PCR_N4_SL 0x0000f800 /* Event Select */
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#define PCR_N4_SL_SHIFT 11
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#define PCR_N4_PICNPT 0x00010000 /* PIC non-privileged trap */
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#define PCR_N4_PICNHT 0x00020000 /* PIC non-hypervisor trap */
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#define PCR_N4_NTC 0x00040000 /* Next-To-Commit wrap */
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extern int pcr_arch_init(void);
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#endif /* __PCR_H */
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