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The clock controller is located in a register range (called "HHI") which contains more than just registers for the clock controller. Known consumers of the HHI register range are: - the clock controller - a reset controller - temperature sensor calibration coefficient (TSC) (only on Meson8b and Meson8m2) - HDMI controller The main reason for using a syscon is the "temperature sensor calibration coefficient" which has to be set for the built-in temperature sensor to work correctly. Four TSC bits are located in the SAR ADC's register space. However on Meson8b and Meson8m2 there is a fifth TSC bit which is unfortunately located in the HHI register space. To be more precise, bit 9 of the HHI_DPLL_TOP_0 register (which sits right between the HHI_SYS_PLL and HHI_VID_PLL registers). Get the regmap from the parent (HHI syscon) node to support all functionality of the HHI register range. Backwards compatibility with old .dtbs is ensured by falling back to parsing the registers just like before this change. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181028120859.5735-3-martin.blumenstingl@googlemail.com |
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.. | ||
axg-aoclk.c | ||
axg-aoclk.h | ||
axg-audio.c | ||
axg-audio.h | ||
axg.c | ||
axg.h | ||
clk-mpll.c | ||
clk-phase.c | ||
clk-pll.c | ||
clk-regmap.c | ||
clk-regmap.h | ||
clk-triphase.c | ||
clkc-audio.h | ||
clkc.h | ||
gxbb-aoclk-32k.c | ||
gxbb-aoclk.c | ||
gxbb-aoclk.h | ||
gxbb.c | ||
gxbb.h | ||
Kconfig | ||
Makefile | ||
meson8b.c | ||
meson8b.h | ||
meson-aoclk.c | ||
meson-aoclk.h | ||
sclk-div.c | ||
vid-pll-div.c |