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e244d2058d
Now that there are header files for each SoC, let's use them in the bcm63xx-gate controller driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Link: https://lore.kernel.org/r/20200615090231.2932696-9-noltari@gmail.com Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
580 lines
11 KiB
C
580 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/clk-provider.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <dt-bindings/clock/bcm3368-clock.h>
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#include <dt-bindings/clock/bcm6318-clock.h>
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#include <dt-bindings/clock/bcm6328-clock.h>
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#include <dt-bindings/clock/bcm6358-clock.h>
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#include <dt-bindings/clock/bcm6362-clock.h>
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#include <dt-bindings/clock/bcm6368-clock.h>
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#include <dt-bindings/clock/bcm63268-clock.h>
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struct clk_bcm63xx_table_entry {
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const char * const name;
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u8 bit;
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unsigned long flags;
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};
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struct clk_bcm63xx_hw {
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void __iomem *regs;
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spinlock_t lock;
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struct clk_hw_onecell_data data;
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};
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static const struct clk_bcm63xx_table_entry bcm3368_clocks[] = {
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{
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.name = "mac",
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.bit = BCM3368_CLK_MAC,
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}, {
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.name = "tc",
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.bit = BCM3368_CLK_TC,
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}, {
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.name = "us_top",
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.bit = BCM3368_CLK_US_TOP,
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}, {
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.name = "ds_top",
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.bit = BCM3368_CLK_DS_TOP,
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}, {
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.name = "acm",
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.bit = BCM3368_CLK_ACM,
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}, {
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.name = "spi",
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.bit = BCM3368_CLK_SPI,
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}, {
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.name = "usbs",
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.bit = BCM3368_CLK_USBS,
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}, {
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.name = "bmu",
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.bit = BCM3368_CLK_BMU,
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}, {
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.name = "pcm",
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.bit = BCM3368_CLK_PCM,
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}, {
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.name = "ntp",
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.bit = BCM3368_CLK_NTP,
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}, {
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.name = "acp_b",
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.bit = BCM3368_CLK_ACP_B,
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}, {
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.name = "acp_a",
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.bit = BCM3368_CLK_ACP_A,
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}, {
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.name = "emusb",
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.bit = BCM3368_CLK_EMUSB,
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}, {
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.name = "enet0",
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.bit = BCM3368_CLK_ENET0,
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}, {
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.name = "enet1",
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.bit = BCM3368_CLK_ENET1,
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}, {
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.name = "usbsu",
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.bit = BCM3368_CLK_USBSU,
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}, {
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.name = "ephy",
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.bit = BCM3368_CLK_EPHY,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6318_clocks[] = {
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{
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.name = "adsl_asb",
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.bit = BCM6318_CLK_ADSL_ASB,
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}, {
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.name = "usb_asb",
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.bit = BCM6318_CLK_USB_ASB,
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}, {
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.name = "mips_asb",
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.bit = BCM6318_CLK_MIPS_ASB,
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}, {
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.name = "pcie_asb",
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.bit = BCM6318_CLK_PCIE_ASB,
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}, {
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.name = "phymips_asb",
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.bit = BCM6318_CLK_PHYMIPS_ASB,
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}, {
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.name = "robosw_asb",
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.bit = BCM6318_CLK_ROBOSW_ASB,
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}, {
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.name = "sar_asb",
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.bit = BCM6318_CLK_SAR_ASB,
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}, {
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.name = "sdr_asb",
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.bit = BCM6318_CLK_SDR_ASB,
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}, {
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.name = "swreg_asb",
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.bit = BCM6318_CLK_SWREG_ASB,
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}, {
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.name = "periph_asb",
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.bit = BCM6318_CLK_PERIPH_ASB,
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}, {
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.name = "cpubus160",
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.bit = BCM6318_CLK_CPUBUS160,
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}, {
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.name = "adsl",
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.bit = BCM6318_CLK_ADSL,
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}, {
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.name = "sar125",
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.bit = BCM6318_CLK_SAR125,
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}, {
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.name = "mips",
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.bit = BCM6318_CLK_MIPS,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "pcie",
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.bit = BCM6318_CLK_PCIE,
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}, {
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.name = "robosw250",
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.bit = BCM6318_CLK_ROBOSW250,
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}, {
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.name = "robosw025",
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.bit = BCM6318_CLK_ROBOSW025,
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}, {
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.name = "sdr",
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.bit = BCM6318_CLK_SDR,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "usbd",
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.bit = BCM6318_CLK_USBD,
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}, {
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.name = "hsspi",
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.bit = BCM6318_CLK_HSSPI,
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}, {
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.name = "pcie25",
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.bit = BCM6318_CLK_PCIE25,
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}, {
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.name = "phymips",
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.bit = BCM6318_CLK_PHYMIPS,
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}, {
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.name = "afe",
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.bit = BCM6318_CLK_AFE,
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}, {
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.name = "qproc",
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.bit = BCM6318_CLK_QPROC,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6318_ubus_clocks[] = {
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{
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.name = "adsl-ubus",
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.bit = BCM6318_UCLK_ADSL,
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}, {
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.name = "arb-ubus",
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.bit = BCM6318_UCLK_ARB,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "mips-ubus",
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.bit = BCM6318_UCLK_MIPS,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "pcie-ubus",
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.bit = BCM6318_UCLK_PCIE,
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}, {
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.name = "periph-ubus",
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.bit = BCM6318_UCLK_PERIPH,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "phymips-ubus",
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.bit = BCM6318_UCLK_PHYMIPS,
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}, {
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.name = "robosw-ubus",
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.bit = BCM6318_UCLK_ROBOSW,
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}, {
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.name = "sar-ubus",
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.bit = BCM6318_UCLK_SAR,
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}, {
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.name = "sdr-ubus",
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.bit = BCM6318_UCLK_SDR,
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}, {
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.name = "usb-ubus",
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.bit = BCM6318_UCLK_USB,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6328_clocks[] = {
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{
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.name = "phy_mips",
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.bit = BCM6328_CLK_PHYMIPS,
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}, {
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.name = "adsl_qproc",
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.bit = BCM6328_CLK_ADSL_QPROC,
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}, {
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.name = "adsl_afe",
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.bit = BCM6328_CLK_ADSL_AFE,
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}, {
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.name = "adsl",
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.bit = BCM6328_CLK_ADSL,
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}, {
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.name = "mips",
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.bit = BCM6328_CLK_MIPS,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "sar",
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.bit = BCM6328_CLK_SAR,
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}, {
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.name = "pcm",
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.bit = BCM6328_CLK_PCM,
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}, {
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.name = "usbd",
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.bit = BCM6328_CLK_USBD,
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}, {
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.name = "usbh",
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.bit = BCM6328_CLK_USBH,
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}, {
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.name = "hsspi",
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.bit = BCM6328_CLK_HSSPI,
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}, {
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.name = "pcie",
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.bit = BCM6328_CLK_PCIE,
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}, {
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.name = "robosw",
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.bit = BCM6328_CLK_ROBOSW,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6358_clocks[] = {
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{
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.name = "enet",
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.bit = BCM6358_CLK_ENET,
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}, {
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.name = "adslphy",
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.bit = BCM6358_CLK_ADSLPHY,
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}, {
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.name = "pcm",
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.bit = BCM6358_CLK_PCM,
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}, {
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.name = "spi",
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.bit = BCM6358_CLK_SPI,
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}, {
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.name = "usbs",
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.bit = BCM6358_CLK_USBS,
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}, {
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.name = "sar",
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.bit = BCM6358_CLK_SAR,
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}, {
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.name = "emusb",
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.bit = BCM6358_CLK_EMUSB,
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}, {
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.name = "enet0",
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.bit = BCM6358_CLK_ENET0,
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}, {
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.name = "enet1",
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.bit = BCM6358_CLK_ENET1,
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}, {
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.name = "usbsu",
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.bit = BCM6358_CLK_USBSU,
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}, {
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.name = "ephy",
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.bit = BCM6358_CLK_EPHY,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6362_clocks[] = {
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{
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.name = "adsl_qproc",
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.bit = BCM6362_CLK_ADSL_QPROC,
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}, {
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.name = "adsl_afe",
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.bit = BCM6362_CLK_ADSL_AFE,
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}, {
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.name = "adsl",
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.bit = BCM6362_CLK_ADSL,
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}, {
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.name = "mips",
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.bit = BCM6362_CLK_MIPS,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "wlan_ocp",
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.bit = BCM6362_CLK_WLAN_OCP,
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}, {
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.name = "swpkt_usb",
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.bit = BCM6362_CLK_SWPKT_USB,
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}, {
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.name = "swpkt_sar",
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.bit = BCM6362_CLK_SWPKT_SAR,
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}, {
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.name = "sar",
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.bit = BCM6362_CLK_SAR,
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}, {
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.name = "robosw",
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.bit = BCM6362_CLK_ROBOSW,
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}, {
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.name = "pcm",
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.bit = BCM6362_CLK_PCM,
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}, {
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.name = "usbd",
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.bit = BCM6362_CLK_USBD,
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}, {
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.name = "usbh",
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.bit = BCM6362_CLK_USBH,
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}, {
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.name = "ipsec",
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.bit = BCM6362_CLK_IPSEC,
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}, {
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.name = "spi",
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.bit = BCM6362_CLK_SPI,
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}, {
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.name = "hsspi",
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.bit = BCM6362_CLK_HSSPI,
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}, {
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.name = "pcie",
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.bit = BCM6362_CLK_PCIE,
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}, {
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.name = "fap",
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.bit = BCM6362_CLK_FAP,
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}, {
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.name = "phymips",
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.bit = BCM6362_CLK_PHYMIPS,
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}, {
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.name = "nand",
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.bit = BCM6362_CLK_NAND,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm6368_clocks[] = {
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{
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.name = "vdsl_qproc",
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.bit = BCM6368_CLK_VDSL_QPROC,
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}, {
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.name = "vdsl_afe",
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.bit = BCM6368_CLK_VDSL_AFE,
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}, {
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.name = "vdsl_bonding",
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.bit = BCM6368_CLK_VDSL_BONDING,
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}, {
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.name = "vdsl",
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.bit = BCM6368_CLK_VDSL,
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}, {
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.name = "phymips",
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.bit = BCM6368_CLK_PHYMIPS,
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}, {
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.name = "swpkt_usb",
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.bit = BCM6368_CLK_SWPKT_USB,
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}, {
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.name = "swpkt_sar",
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.bit = BCM6368_CLK_SWPKT_SAR,
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}, {
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.name = "spi",
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.bit = BCM6368_CLK_SPI,
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}, {
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.name = "usbd",
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.bit = BCM6368_CLK_USBD,
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}, {
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.name = "sar",
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.bit = BCM6368_CLK_SAR,
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}, {
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.name = "robosw",
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.bit = BCM6368_CLK_ROBOSW,
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}, {
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.name = "utopia",
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.bit = BCM6368_CLK_UTOPIA,
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}, {
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.name = "pcm",
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.bit = BCM6368_CLK_PCM,
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}, {
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.name = "usbh",
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.bit = BCM6368_CLK_USBH,
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}, {
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.name = "disable_gless",
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.bit = BCM6368_CLK_DIS_GLESS,
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}, {
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.name = "nand",
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.bit = BCM6368_CLK_NAND,
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}, {
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.name = "ipsec",
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.bit = BCM6368_CLK_IPSEC,
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}, {
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/* sentinel */
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},
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};
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static const struct clk_bcm63xx_table_entry bcm63268_clocks[] = {
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{
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.name = "disable_gless",
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.bit = BCM63268_CLK_DIS_GLESS,
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}, {
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.name = "vdsl_qproc",
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.bit = BCM63268_CLK_VDSL_QPROC,
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}, {
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.name = "vdsl_afe",
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.bit = BCM63268_CLK_VDSL_AFE,
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}, {
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.name = "vdsl",
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.bit = BCM63268_CLK_VDSL,
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}, {
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.name = "mips",
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.bit = BCM63268_CLK_MIPS,
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.flags = CLK_IS_CRITICAL,
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}, {
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.name = "wlan_ocp",
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.bit = BCM63268_CLK_WLAN_OCP,
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}, {
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.name = "dect",
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.bit = BCM63268_CLK_DECT,
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}, {
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.name = "fap0",
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.bit = BCM63268_CLK_FAP0,
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}, {
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.name = "fap1",
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.bit = BCM63268_CLK_FAP1,
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}, {
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.name = "sar",
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.bit = BCM63268_CLK_SAR,
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}, {
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.name = "robosw",
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.bit = BCM63268_CLK_ROBOSW,
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}, {
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.name = "pcm",
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.bit = BCM63268_CLK_PCM,
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}, {
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.name = "usbd",
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.bit = BCM63268_CLK_USBD,
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}, {
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.name = "usbh",
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.bit = BCM63268_CLK_USBH,
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}, {
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.name = "ipsec",
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.bit = BCM63268_CLK_IPSEC,
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}, {
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.name = "spi",
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.bit = BCM63268_CLK_SPI,
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}, {
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.name = "hsspi",
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.bit = BCM63268_CLK_HSSPI,
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}, {
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.name = "pcie",
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.bit = BCM63268_CLK_PCIE,
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}, {
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.name = "phymips",
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.bit = BCM63268_CLK_PHYMIPS,
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}, {
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.name = "gmac",
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.bit = BCM63268_CLK_GMAC,
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}, {
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.name = "nand",
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.bit = BCM63268_CLK_NAND,
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}, {
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.name = "tbus",
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.bit = BCM63268_CLK_TBUS,
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}, {
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.name = "robosw250",
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.bit = BCM63268_CLK_ROBOSW250,
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}, {
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/* sentinel */
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},
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};
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static int clk_bcm63xx_probe(struct platform_device *pdev)
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{
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const struct clk_bcm63xx_table_entry *entry, *table;
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struct clk_bcm63xx_hw *hw;
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u8 maxbit = 0;
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int i, ret;
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table = of_device_get_match_data(&pdev->dev);
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if (!table)
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return -EINVAL;
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for (entry = table; entry->name; entry++)
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maxbit = max_t(u8, maxbit, entry->bit);
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maxbit++;
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hw = devm_kzalloc(&pdev->dev, struct_size(hw, data.hws, maxbit),
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GFP_KERNEL);
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if (!hw)
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return -ENOMEM;
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platform_set_drvdata(pdev, hw);
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spin_lock_init(&hw->lock);
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|
hw->data.num = maxbit;
|
|
for (i = 0; i < maxbit; i++)
|
|
hw->data.hws[i] = ERR_PTR(-ENODEV);
|
|
|
|
hw->regs = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(hw->regs))
|
|
return PTR_ERR(hw->regs);
|
|
|
|
for (entry = table; entry->name; entry++) {
|
|
struct clk_hw *clk;
|
|
|
|
clk = clk_hw_register_gate(&pdev->dev, entry->name, NULL,
|
|
entry->flags, hw->regs, entry->bit,
|
|
CLK_GATE_BIG_ENDIAN, &hw->lock);
|
|
if (IS_ERR(clk)) {
|
|
ret = PTR_ERR(clk);
|
|
goto out_err;
|
|
}
|
|
|
|
hw->data.hws[entry->bit] = clk;
|
|
}
|
|
|
|
ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
|
|
&hw->data);
|
|
if (!ret)
|
|
return 0;
|
|
out_err:
|
|
for (i = 0; i < hw->data.num; i++) {
|
|
if (!IS_ERR(hw->data.hws[i]))
|
|
clk_hw_unregister_gate(hw->data.hws[i]);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int clk_bcm63xx_remove(struct platform_device *pdev)
|
|
{
|
|
struct clk_bcm63xx_hw *hw = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
of_clk_del_provider(pdev->dev.of_node);
|
|
|
|
for (i = 0; i < hw->data.num; i++) {
|
|
if (!IS_ERR(hw->data.hws[i]))
|
|
clk_hw_unregister_gate(hw->data.hws[i]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id clk_bcm63xx_dt_ids[] = {
|
|
{ .compatible = "brcm,bcm3368-clocks", .data = &bcm3368_clocks, },
|
|
{ .compatible = "brcm,bcm6318-clocks", .data = &bcm6318_clocks, },
|
|
{ .compatible = "brcm,bcm6318-ubus-clocks", .data = &bcm6318_ubus_clocks, },
|
|
{ .compatible = "brcm,bcm6328-clocks", .data = &bcm6328_clocks, },
|
|
{ .compatible = "brcm,bcm6358-clocks", .data = &bcm6358_clocks, },
|
|
{ .compatible = "brcm,bcm6362-clocks", .data = &bcm6362_clocks, },
|
|
{ .compatible = "brcm,bcm6368-clocks", .data = &bcm6368_clocks, },
|
|
{ .compatible = "brcm,bcm63268-clocks", .data = &bcm63268_clocks, },
|
|
{ }
|
|
};
|
|
|
|
static struct platform_driver clk_bcm63xx = {
|
|
.probe = clk_bcm63xx_probe,
|
|
.remove = clk_bcm63xx_remove,
|
|
.driver = {
|
|
.name = "bcm63xx-clock",
|
|
.of_match_table = clk_bcm63xx_dt_ids,
|
|
},
|
|
};
|
|
builtin_platform_driver(clk_bcm63xx);
|