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3771df3cff
Add support for c62x accelerator Virtual Function Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
174 lines
5.4 KiB
C
174 lines
5.4 KiB
C
/*
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This file is provided under a dual BSD/GPLv2 license. When using or
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redistributing this file, you may do so under either license.
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GPL LICENSE SUMMARY
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Copyright(c) 2015 Intel Corporation.
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This program is free software; you can redistribute it and/or modify
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it under the terms of version 2 of the GNU General Public License as
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published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Contact Information:
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qat-linux@intel.com
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BSD LICENSE
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Copyright(c) 2015 Intel Corporation.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <adf_accel_devices.h>
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#include <adf_pf2vf_msg.h>
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#include <adf_common_drv.h>
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#include "adf_c62xvf_hw_data.h"
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static struct adf_hw_device_class c62xiov_class = {
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.name = ADF_C62XVF_DEVICE_NAME,
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.type = DEV_C62XVF,
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.instances = 0
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};
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static u32 get_accel_mask(u32 fuse)
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{
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return ADF_C62XIOV_ACCELERATORS_MASK;
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}
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static u32 get_ae_mask(u32 fuse)
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{
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return ADF_C62XIOV_ACCELENGINES_MASK;
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}
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static u32 get_num_accels(struct adf_hw_device_data *self)
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{
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return ADF_C62XIOV_MAX_ACCELERATORS;
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}
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static u32 get_num_aes(struct adf_hw_device_data *self)
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{
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return ADF_C62XIOV_MAX_ACCELENGINES;
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}
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static u32 get_misc_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_C62XIOV_PMISC_BAR;
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}
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static u32 get_etr_bar_id(struct adf_hw_device_data *self)
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{
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return ADF_C62XIOV_ETR_BAR;
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}
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static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
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{
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return DEV_SKU_VF;
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}
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static u32 get_pf2vf_offset(u32 i)
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{
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return ADF_C62XIOV_PF2VF_OFFSET;
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}
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static u32 get_vintmsk_offset(u32 i)
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{
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return ADF_C62XIOV_VINTMSK_OFFSET;
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}
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static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
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{
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return 0;
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}
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static void adf_vf_void_noop(struct adf_accel_dev *accel_dev)
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{
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}
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static int adf_vf2pf_init(struct adf_accel_dev *accel_dev)
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{
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u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM |
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(ADF_VF2PF_MSGTYPE_INIT << ADF_VF2PF_MSGTYPE_SHIFT));
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if (adf_iov_putmsg(accel_dev, msg, 0)) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to send Init event to PF\n");
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return -EFAULT;
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}
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return 0;
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}
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static void adf_vf2pf_shutdown(struct adf_accel_dev *accel_dev)
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{
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u32 msg = (ADF_VF2PF_MSGORIGIN_SYSTEM |
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(ADF_VF2PF_MSGTYPE_SHUTDOWN << ADF_VF2PF_MSGTYPE_SHIFT));
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if (adf_iov_putmsg(accel_dev, msg, 0))
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dev_err(&GET_DEV(accel_dev),
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"Failed to send Shutdown event to PF\n");
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}
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void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class = &c62xiov_class;
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hw_data->num_banks = ADF_C62XIOV_ETR_MAX_BANKS;
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hw_data->num_accel = ADF_C62XIOV_MAX_ACCELERATORS;
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hw_data->num_logical_accel = 1;
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hw_data->num_engines = ADF_C62XIOV_MAX_ACCELENGINES;
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hw_data->tx_rx_gap = ADF_C62XIOV_RX_RINGS_OFFSET;
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hw_data->tx_rings_mask = ADF_C62XIOV_TX_RINGS_MASK;
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hw_data->alloc_irq = adf_vf_isr_resource_alloc;
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hw_data->free_irq = adf_vf_isr_resource_free;
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hw_data->enable_error_correction = adf_vf_void_noop;
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hw_data->init_admin_comms = adf_vf_int_noop;
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hw_data->exit_admin_comms = adf_vf_void_noop;
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hw_data->send_admin_init = adf_vf2pf_init;
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hw_data->init_arb = adf_vf_int_noop;
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hw_data->exit_arb = adf_vf_void_noop;
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hw_data->disable_iov = adf_vf2pf_shutdown;
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hw_data->get_accel_mask = get_accel_mask;
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hw_data->get_ae_mask = get_ae_mask;
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hw_data->get_num_accels = get_num_accels;
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hw_data->get_num_aes = get_num_aes;
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hw_data->get_etr_bar_id = get_etr_bar_id;
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hw_data->get_misc_bar_id = get_misc_bar_id;
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hw_data->get_pf2vf_offset = get_pf2vf_offset;
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hw_data->get_vintmsk_offset = get_vintmsk_offset;
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hw_data->get_sku = get_sku;
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hw_data->enable_ints = adf_vf_void_noop;
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hw_data->enable_vf2pf_comms = adf_enable_vf2pf_comms;
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hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION;
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hw_data->dev_class->instances++;
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adf_devmgr_update_class_index(hw_data);
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}
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void adf_clean_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
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{
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hw_data->dev_class->instances--;
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adf_devmgr_update_class_index(hw_data);
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}
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