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8f4b01fcde
The nvdimm core currently maps the full namespace to an ioremap range while probing the namespace mode. This can result in probe failures on architectures that have limited ioremap space. For example, with a large btt namespace that consumes most of I/O remap range, depending on the sequence of namespace initialization, the user can find a pfn namespace initialization failure due to unavailable I/O remap space which nvdimm core uses for temporary mapping. nvdimm core can avoid this failure by only mapping the reserved info block area to check for pfn superblock type and map the full namespace resource only before using the namespace. Given that personalities like BTT can be layered on top of any namespace type create a generic form of devm_nsio_enable (devm_namespace_enable) and use it inside the per-personality attach routines. Now devm_namespace_enable() is always paired with disable unless the mapping is going to be used for long term runtime access. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Link: https://lore.kernel.org/r/20191017073308.32645-1-aneesh.kumar@linux.ibm.com [djbw: reworks to move devm_namespace_{en,dis}able into *attach helpers] Reported-by: kbuild test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20191031105741.102793-2-aneesh.kumar@linux.ibm.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
72 lines
2.1 KiB
C
72 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2016 - 2018 Intel Corporation. All rights reserved. */
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#include <linux/memremap.h>
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#include <linux/module.h>
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#include <linux/pfn_t.h>
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#include "../../nvdimm/pfn.h"
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#include "../../nvdimm/nd.h"
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#include "../bus.h"
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struct dev_dax *__dax_pmem_probe(struct device *dev, enum dev_dax_subsys subsys)
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{
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struct resource res;
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int rc, id, region_id;
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resource_size_t offset;
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struct nd_pfn_sb *pfn_sb;
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struct dev_dax *dev_dax;
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struct nd_namespace_io *nsio;
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struct dax_region *dax_region;
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struct dev_pagemap pgmap = { };
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struct nd_namespace_common *ndns;
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struct nd_dax *nd_dax = to_nd_dax(dev);
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struct nd_pfn *nd_pfn = &nd_dax->nd_pfn;
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struct nd_region *nd_region = to_nd_region(dev->parent);
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ndns = nvdimm_namespace_common_probe(dev);
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if (IS_ERR(ndns))
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return ERR_CAST(ndns);
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/* parse the 'pfn' info block via ->rw_bytes */
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rc = devm_namespace_enable(dev, ndns, nd_info_block_reserve());
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if (rc)
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return ERR_PTR(rc);
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rc = nvdimm_setup_pfn(nd_pfn, &pgmap);
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if (rc)
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return ERR_PTR(rc);
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devm_namespace_disable(dev, ndns);
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/* reserve the metadata area, device-dax will reserve the data */
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pfn_sb = nd_pfn->pfn_sb;
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offset = le64_to_cpu(pfn_sb->dataoff);
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nsio = to_nd_namespace_io(&ndns->dev);
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if (!devm_request_mem_region(dev, nsio->res.start, offset,
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dev_name(&ndns->dev))) {
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dev_warn(dev, "could not reserve metadata\n");
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return ERR_PTR(-EBUSY);
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}
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rc = sscanf(dev_name(&ndns->dev), "namespace%d.%d", ®ion_id, &id);
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if (rc != 2)
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return ERR_PTR(-EINVAL);
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/* adjust the dax_region resource to the start of data */
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memcpy(&res, &pgmap.res, sizeof(res));
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res.start += offset;
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dax_region = alloc_dax_region(dev, region_id, &res,
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nd_region->target_node, le32_to_cpu(pfn_sb->align),
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PFN_DEV|PFN_MAP);
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if (!dax_region)
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return ERR_PTR(-ENOMEM);
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dev_dax = __devm_create_dev_dax(dax_region, id, &pgmap, subsys);
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/* child dev_dax instances now own the lifetime of the dax_region */
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dax_region_put(dax_region);
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return dev_dax;
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}
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EXPORT_SYMBOL_GPL(__dax_pmem_probe);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Intel Corporation");
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