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5e2e0195ec
The current code adds aliases, if necessary, directly when adding the clock, limiting the number of possible aliases to one. Some platforms need more than one alias, like the hsmmc pclocks on s3c2416 which need a "hsmmc" and "mmc_busclk.0" alias for the s3c- sdhci driver. Therefore add the possibility to separately add clock aliases for previously created clocks. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
289 lines
8.2 KiB
C
289 lines
8.2 KiB
C
/*
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* Copyright (c) 2013 Linaro Ltd.
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* Author: Thomas Abraham <thomas.ab@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Common Clock Framework support for all Samsung platforms
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*/
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#ifndef __SAMSUNG_CLK_H
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#define __SAMSUNG_CLK_H
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <mach/map.h>
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/**
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* struct samsung_clock_alias: information about mux clock
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* @id: platform specific id of the clock.
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* @dev_name: name of the device to which this clock belongs.
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* @alias: optional clock alias name to be assigned to this clock.
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*/
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struct samsung_clock_alias {
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unsigned int id;
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const char *dev_name;
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const char *alias;
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};
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#define ALIAS(_id, dname, a) \
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{ \
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.id = _id, \
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.dev_name = dname, \
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.alias = a, \
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}
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/**
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* struct samsung_fixed_rate_clock: information about fixed-rate clock
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* @id: platform specific id of the clock.
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* @name: name of this fixed-rate clock.
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* @parent_name: optional parent clock name.
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* @flags: optional fixed-rate clock flags.
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* @fixed-rate: fixed clock rate of this clock.
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*/
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struct samsung_fixed_rate_clock {
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unsigned int id;
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char *name;
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const char *parent_name;
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unsigned long flags;
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unsigned long fixed_rate;
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};
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#define FRATE(_id, cname, pname, f, frate) \
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{ \
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.id = _id, \
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.name = cname, \
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.parent_name = pname, \
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.flags = f, \
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.fixed_rate = frate, \
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}
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/*
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* struct samsung_fixed_factor_clock: information about fixed-factor clock
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* @id: platform specific id of the clock.
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* @name: name of this fixed-factor clock.
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* @parent_name: parent clock name.
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* @mult: fixed multiplication factor.
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* @div: fixed division factor.
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* @flags: optional fixed-factor clock flags.
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*/
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struct samsung_fixed_factor_clock {
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unsigned int id;
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char *name;
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const char *parent_name;
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unsigned long mult;
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unsigned long div;
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unsigned long flags;
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};
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#define FFACTOR(_id, cname, pname, m, d, f) \
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{ \
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.id = _id, \
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.name = cname, \
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.parent_name = pname, \
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.mult = m, \
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.div = d, \
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.flags = f, \
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}
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/**
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* struct samsung_mux_clock: information about mux clock
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* @id: platform specific id of the clock.
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* @dev_name: name of the device to which this clock belongs.
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* @name: name of this mux clock.
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* @parent_names: array of pointer to parent clock names.
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* @num_parents: number of parents listed in @parent_names.
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* @flags: optional flags for basic clock.
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* @offset: offset of the register for configuring the mux.
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* @shift: starting bit location of the mux control bit-field in @reg.
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* @width: width of the mux control bit-field in @reg.
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* @mux_flags: flags for mux-type clock.
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* @alias: optional clock alias name to be assigned to this clock.
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*/
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struct samsung_mux_clock {
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unsigned int id;
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const char *dev_name;
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const char *name;
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const char **parent_names;
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u8 num_parents;
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unsigned long flags;
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unsigned long offset;
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u8 shift;
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u8 width;
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u8 mux_flags;
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const char *alias;
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};
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#define __MUX(_id, dname, cname, pnames, o, s, w, f, mf, a) \
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{ \
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.id = _id, \
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.dev_name = dname, \
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.name = cname, \
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.parent_names = pnames, \
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.num_parents = ARRAY_SIZE(pnames), \
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.flags = f, \
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.offset = o, \
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.shift = s, \
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.width = w, \
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.mux_flags = mf, \
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.alias = a, \
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}
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#define MUX(_id, cname, pnames, o, s, w) \
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__MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, NULL)
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#define MUX_A(_id, cname, pnames, o, s, w, a) \
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__MUX(_id, NULL, cname, pnames, o, s, w, 0, 0, a)
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#define MUX_F(_id, cname, pnames, o, s, w, f, mf) \
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__MUX(_id, NULL, cname, pnames, o, s, w, f, mf, NULL)
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/**
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* @id: platform specific id of the clock.
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* struct samsung_div_clock: information about div clock
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* @dev_name: name of the device to which this clock belongs.
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* @name: name of this div clock.
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* @parent_name: name of the parent clock.
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* @flags: optional flags for basic clock.
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* @offset: offset of the register for configuring the div.
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* @shift: starting bit location of the div control bit-field in @reg.
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* @div_flags: flags for div-type clock.
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* @alias: optional clock alias name to be assigned to this clock.
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*/
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struct samsung_div_clock {
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unsigned int id;
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const char *dev_name;
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const char *name;
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const char *parent_name;
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unsigned long flags;
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unsigned long offset;
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u8 shift;
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u8 width;
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u8 div_flags;
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const char *alias;
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struct clk_div_table *table;
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};
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#define __DIV(_id, dname, cname, pname, o, s, w, f, df, a, t) \
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{ \
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.id = _id, \
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.dev_name = dname, \
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.name = cname, \
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.parent_name = pname, \
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.flags = f, \
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.offset = o, \
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.shift = s, \
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.width = w, \
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.div_flags = df, \
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.alias = a, \
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.table = t, \
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}
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#define DIV(_id, cname, pname, o, s, w) \
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__DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, NULL)
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#define DIV_A(_id, cname, pname, o, s, w, a) \
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__DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a, NULL)
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#define DIV_F(_id, cname, pname, o, s, w, f, df) \
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__DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL, NULL)
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#define DIV_T(_id, cname, pname, o, s, w, t) \
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__DIV(_id, NULL, cname, pname, o, s, w, 0, 0, NULL, t)
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/**
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* struct samsung_gate_clock: information about gate clock
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* @id: platform specific id of the clock.
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* @dev_name: name of the device to which this clock belongs.
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* @name: name of this gate clock.
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* @parent_name: name of the parent clock.
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* @flags: optional flags for basic clock.
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* @offset: offset of the register for configuring the gate.
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* @bit_idx: bit index of the gate control bit-field in @reg.
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* @gate_flags: flags for gate-type clock.
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* @alias: optional clock alias name to be assigned to this clock.
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*/
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struct samsung_gate_clock {
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unsigned int id;
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const char *dev_name;
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const char *name;
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const char *parent_name;
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unsigned long flags;
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unsigned long offset;
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u8 bit_idx;
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u8 gate_flags;
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const char *alias;
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};
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#define __GATE(_id, dname, cname, pname, o, b, f, gf, a) \
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{ \
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.id = _id, \
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.dev_name = dname, \
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.name = cname, \
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.parent_name = pname, \
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.flags = f, \
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.offset = o, \
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.bit_idx = b, \
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.gate_flags = gf, \
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.alias = a, \
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}
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#define GATE(_id, cname, pname, o, b, f, gf) \
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__GATE(_id, NULL, cname, pname, o, b, f, gf, NULL)
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#define GATE_A(_id, cname, pname, o, b, f, gf, a) \
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__GATE(_id, NULL, cname, pname, o, b, f, gf, a)
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#define GATE_D(_id, dname, cname, pname, o, b, f, gf) \
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__GATE(_id, dname, cname, pname, o, b, f, gf, NULL)
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#define GATE_DA(_id, dname, cname, pname, o, b, f, gf, a) \
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__GATE(_id, dname, cname, pname, o, b, f, gf, a)
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#define PNAME(x) static const char *x[] __initdata
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/**
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* struct samsung_clk_reg_dump: register dump of clock controller registers.
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* @offset: clock register offset from the controller base address.
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* @value: the value to be register at offset.
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*/
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struct samsung_clk_reg_dump {
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u32 offset;
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u32 value;
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};
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extern void __init samsung_clk_init(struct device_node *np, void __iomem *base,
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unsigned long nr_clks, unsigned long *rdump,
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unsigned long nr_rdump);
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extern void __init samsung_clk_of_register_fixed_ext(
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struct samsung_fixed_rate_clock *fixed_rate_clk,
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unsigned int nr_fixed_rate_clk,
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struct of_device_id *clk_matches);
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extern void samsung_clk_add_lookup(struct clk *clk, unsigned int id);
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extern void samsung_clk_register_alias(struct samsung_clock_alias *list,
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unsigned int nr_clk);
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extern void __init samsung_clk_register_fixed_rate(
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struct samsung_fixed_rate_clock *clk_list, unsigned int nr_clk);
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extern void __init samsung_clk_register_fixed_factor(
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struct samsung_fixed_factor_clock *list, unsigned int nr_clk);
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extern void __init samsung_clk_register_mux(struct samsung_mux_clock *clk_list,
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unsigned int nr_clk);
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extern void __init samsung_clk_register_div(struct samsung_div_clock *clk_list,
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unsigned int nr_clk);
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extern void __init samsung_clk_register_gate(
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struct samsung_gate_clock *clk_list, unsigned int nr_clk);
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extern unsigned long _get_rate(const char *clk_name);
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#endif /* __SAMSUNG_CLK_H */
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