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For PL330 dma controllers instantiated from device tree, the channel lookup is based on phandle of the dma controller and dma request id specified by the client node. During probe, the private data of each channel of the controller is set to point to the device node of the dma controller. The 'chan_id' of the each channel is used as the dma request id. Client driver requesting dma channels specify the phandle of the dma controller and the request id. The pl330 filter function converts the phandle to the device node pointer and matches that with channel's private data. If a match is found, the request id from the client node and the 'chan_id' of the channel is matched. A channel is found if both the values match. Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
31 lines
989 B
Plaintext
31 lines
989 B
Plaintext
* ARM PrimeCell PL330 DMA Controller
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The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
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between memory and peripherals or memory to memory.
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Required properties:
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- compatible: should include both "arm,pl330" and "arm,primecell".
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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Example:
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pdma0: pdma@12680000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12680000 0x1000>;
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interrupts = <99>;
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};
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Client drivers (device nodes requiring dma transfers from dev-to-mem or
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mem-to-dev) should specify the DMA channel numbers using a two-value pair
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as shown below.
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[property name] = <[phandle of the dma controller] [dma request id]>;
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where 'dma request id' is the dma request number which is connected
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to the client controller. The 'property name' is recommended to be
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of the form <name>-dma-channel.
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Example: tx-dma-channel = <&pdma0 12>;
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