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b7d66c88c9
usb0 and usb1 mux settings in the sicrl register were swapped (twice!) in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci and full speed devices. The USB port config on mpc834x is done using 2 muxes: Port 0 is always used for MPH port 0, and port 1 can either be used for MPH port 1 or DR (unless DR uses UTMI phy or OTG, then it uses both ports) - See 8349 RM figure 1-4.. mpc8349_usb_cfg() had this inverted for the DR, and it also had the bit positions of the usb0 / usb1 mux settings swapped. It would basically work if you specified port1 instead of port0 for the MPH controller (and happened to use ULPI phys), which is what all the 834x dts have done, even though that configuration is physically invalid. Instead fix mpc8349_usb_cfg() and adjust the dts files to match reality. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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| 8xx | ||
| 40x | ||
| 44x | ||
| 52xx | ||
| 82xx | ||
| 83xx | ||
| 85xx | ||
| 86xx | ||
| 512x | ||
| amigaone | ||
| cell | ||
| chrp | ||
| embedded6xx | ||
| iseries | ||
| maple | ||
| pasemi | ||
| powermac | ||
| prep | ||
| ps3 | ||
| pseries | ||
| fsl_uli1575.c | ||
| Kconfig | ||
| Kconfig.cputype | ||
| Makefile | ||