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The SDK7786 FPGA has secondary control over the PCIe clocks, specifically relating to the slots and oscillator. This ties the FPGA clocks in to the clock framework and balances the refcounting similar to how the primary on-chip clocks are managed. While the on-chip clocks are per-port, the FPGA clock enable/disable is global for the entire block. Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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dma | ||
pci | ||
superhyway | ||
heartbeat.c | ||
Kconfig | ||
Makefile | ||
push-switch.c |