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https://github.com/edk2-porting/linux-next.git
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6bb27d7349
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
182 lines
4.0 KiB
C
182 lines
4.0 KiB
C
/*
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* linux/arch/arm/mach-sa1100/cerf.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Apr-2003 : Removed some old PDA crud [FB]
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* Oct-2003 : Added uart2 resource [FB]
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* Jan-2004 : Removed io map for flash [FB]
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/tty.h>
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#include <linux/platform_data/sa11x0-serial.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <mach/hardware.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <mach/cerf.h>
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#include <linux/platform_data/mfd-mcp-sa11x0.h>
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#include <mach/irqs.h>
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#include "generic.h"
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static struct resource cerfuart2_resources[] = {
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[0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
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};
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static struct platform_device cerfuart2_device = {
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.name = "sa11x0-uart",
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.id = 2,
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.num_resources = ARRAY_SIZE(cerfuart2_resources),
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.resource = cerfuart2_resources,
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};
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/* LEDs */
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struct gpio_led cerf_gpio_leds[] = {
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{
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.name = "cerf:d0",
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.default_trigger = "heartbeat",
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.gpio = 0,
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},
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{
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.name = "cerf:d1",
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.default_trigger = "cpu0",
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.gpio = 1,
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},
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{
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.name = "cerf:d2",
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.default_trigger = "default-on",
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.gpio = 2,
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},
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{
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.name = "cerf:d3",
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.default_trigger = "default-on",
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.gpio = 3,
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},
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};
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static struct gpio_led_platform_data cerf_gpio_led_info = {
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.leds = cerf_gpio_leds,
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.num_leds = ARRAY_SIZE(cerf_gpio_leds),
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};
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static struct platform_device cerf_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &cerf_gpio_led_info,
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}
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};
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static struct platform_device *cerf_devices[] __initdata = {
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&cerfuart2_device,
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&cerf_leds,
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};
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#ifdef CONFIG_SA1100_CERF_FLASH_32MB
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# define CERF_FLASH_SIZE 0x02000000
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#elif defined CONFIG_SA1100_CERF_FLASH_16MB
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# define CERF_FLASH_SIZE 0x01000000
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#elif defined CONFIG_SA1100_CERF_FLASH_8MB
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# define CERF_FLASH_SIZE 0x00800000
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#else
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# error "Undefined flash size for CERF"
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#endif
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static struct mtd_partition cerf_partitions[] = {
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{
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.name = "Bootloader",
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.size = 0x00020000,
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.offset = 0x00000000,
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}, {
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.name = "Params",
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.size = 0x00040000,
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.offset = 0x00020000,
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}, {
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.name = "Kernel",
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.size = 0x00100000,
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.offset = 0x00060000,
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}, {
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.name = "Filesystem",
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.size = CERF_FLASH_SIZE-0x00160000,
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.offset = 0x00160000,
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}
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};
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static struct flash_platform_data cerf_flash_data = {
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.map_name = "cfi_probe",
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.parts = cerf_partitions,
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.nr_parts = ARRAY_SIZE(cerf_partitions),
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};
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static struct resource cerf_flash_resource =
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DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
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static void __init cerf_init_irq(void)
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{
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sa1100_init_irq();
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irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
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}
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static struct map_desc cerf_io_desc[] __initdata = {
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{ /* Crystal Ethernet Chip */
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.virtual = 0xf0000000,
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.pfn = __phys_to_pfn(0x08000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}
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};
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static void __init cerf_map_io(void)
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{
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sa1100_map_io();
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iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
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sa1100_register_uart(0, 3);
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sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
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sa1100_register_uart(2, 1);
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/* set some GPDR bits here while it's safe */
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GPDR |= CERF_GPIO_CF_RESET;
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}
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static struct mcp_plat_data cerf_mcp_data = {
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.mccr0 = MCCR0_ADM,
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.sclk_rate = 11981000,
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};
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static void __init cerf_init(void)
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{
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sa11x0_ppc_configure_mcp();
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platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
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sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
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sa11x0_register_mcp(&cerf_mcp_data);
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}
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MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
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/* Maintainer: support@intrinsyc.com */
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.map_io = cerf_map_io,
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.nr_irqs = SA1100_NR_IRQS,
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.init_irq = cerf_init_irq,
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.init_time = sa1100_timer_init,
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.init_machine = cerf_init,
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.init_late = sa11x0_init_late,
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.restart = sa11x0_restart,
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MACHINE_END
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