Codrin Ciubotariu 1573eebeaa clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1 ... In clk_generated_determine_rate(), if the divisor is greater than GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned. If clk_generated_set_rate() will be called later with this wrong rate, it will return -EINVAL, so the generated clock won't change its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1. Fixes: 8c7aa63289 ("clk: at91: clk-generated: remove useless divisor loop") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2019-07-22 14:32:08 -07:00
..
at91sam9rl.c	clk: at91: Mark struct clk_range as const	2019-04-25 14:16:26 -07:00
at91sam9x5.c	clk: at91: Mark struct clk_range as const	2019-04-25 14:16:26 -07:00
at91sam9260.c	clk: at91: Mark struct clk_range as const	2019-04-25 14:16:26 -07:00
clk-audio-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-generated.c	clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1	2019-07-22 14:32:08 -07:00
clk-h32mx.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-i2s-mux.c	clk: at91: move DT compatibility code to its own file	2018-10-17 10:45:39 -07:00
clk-main.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-master.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-peripheral.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-plldiv.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-programmable.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-sam9x60-pll.c	clk: at91: add sam9x60 PLL driver	2019-04-25 12:34:06 -07:00
clk-slow.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-smd.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-system.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-usb.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-utmi.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
dt-compat.c	clk: at91: allow configuring generated PCR layout	2019-04-25 12:34:03 -07:00
Makefile	clk: at91: add sam9x60 pmc driver	2019-04-25 14:15:53 -07:00
pmc.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
pmc.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
sam9x60.c	clk: at91: Mark struct clk_range as const	2019-04-25 14:16:26 -07:00
sama5d2.c	Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next	2019-05-07 11:45:29 -07:00
sama5d4.c	clk: at91: Mark struct clk_range as const	2019-04-25 14:16:26 -07:00
sckc.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00