Rajat Jain b5a0a9b59c PCI/ASPM: Read and set up L1 substate capabilities ... The PCIe spec (r3.1, sec 7.33) says the L1 PM Substates Capability may be implemented only in function 0. Read the L1 substate capability structures of upstream and downstream components of the link and set it up in the device structure. [bhelgaas: add specific spec reference] Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>		2017-02-14 17:44:12 -06:00
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aer	pci-v4.10-changes	2016-12-15 12:46:48 -08:00
aspm.c	PCI/ASPM: Read and set up L1 substate capabilities	2017-02-14 17:44:12 -06:00
Kconfig	PCI/ASPM: Add support for L1 substates	2017-02-14 17:43:51 -06:00
Makefile	PCI: Add Precision Time Measurement (PTM) support	2016-08-15 13:44:08 -05:00
pcie-dpc.c	PCI: Make DPC explicitly non-modular	2016-08-24 16:52:24 -05:00
pme.c	PCI/PME: Log PME IRQ when claiming Root Port	2016-12-12 10:05:23 -06:00
portdrv_acpi.c	Merge branches 'pci/dpc', 'pci/resource' and 'pci/thunderbolt' into next	2016-05-03 11:49:21 -05:00
portdrv_bus.c	PCI: Fix whitespace, capitalization, and spelling errors	2013-11-14 11:28:18 -07:00
portdrv_core.c	PCI: Remove service driver load/unload messages	2016-12-12 10:05:24 -06:00
portdrv_pci.c	PCI: Consolidate conditions to allow runtime PM on PCIe ports	2016-11-17 18:46:22 -06:00
portdrv.h	Merge branches 'pci/dpc', 'pci/resource' and 'pci/thunderbolt' into next	2016-05-03 11:49:21 -05:00
ptm.c	PCI: Add PTM clock granularity information	2016-08-25 08:32:34 -05:00