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240e99cbd0
The PAR was exported as CRn == 7 and CRm == 0, but in fact the primary coprocessor register number was determined by CRm for 64-bit coprocessor registers as the user space API was modeled after the coprocessor access instructions (see the ARM ARM rev. C - B3-1445). However, just changing the CRn to CRm breaks the sorting check when booting the kernel, because the internal kernel logic always treats CRn as the primary register number, and it makes the table sorting impossible to understand for humans. Alternatively we could change the logic to always have CRn == CRm, but that becomes unclear in the number of ways we do look up of a coprocessor register. We could also have a separate 64-bit table but that feels somewhat over-engineered. Instead, keep CRn the primary representation of the primary coproc. register number in-kernel and always export the primary number as CRm as per the existing user space ABI. Note: The TTBR registers just magically worked because they happened to follow the CRn(0) regs and were considered CRn(0) in the in-kernel representation. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
157 lines
4.0 KiB
C
157 lines
4.0 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Authors: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __ARM_KVM_COPROC_LOCAL_H__
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#define __ARM_KVM_COPROC_LOCAL_H__
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struct coproc_params {
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unsigned long CRn;
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unsigned long CRm;
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unsigned long Op1;
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unsigned long Op2;
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unsigned long Rt1;
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unsigned long Rt2;
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bool is_64bit;
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bool is_write;
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};
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struct coproc_reg {
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/* MRC/MCR/MRRC/MCRR instruction which accesses it. */
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unsigned long CRn;
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unsigned long CRm;
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unsigned long Op1;
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unsigned long Op2;
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bool is_64;
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/* Trapped access from guest, if non-NULL. */
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bool (*access)(struct kvm_vcpu *,
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const struct coproc_params *,
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const struct coproc_reg *);
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/* Initialization for vcpu. */
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void (*reset)(struct kvm_vcpu *, const struct coproc_reg *);
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/* Index into vcpu->arch.cp15[], or 0 if we don't need to save it. */
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unsigned long reg;
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/* Value (usually reset value) */
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u64 val;
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};
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static inline void print_cp_instr(const struct coproc_params *p)
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{
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/* Look, we even formatted it for you to paste into the table! */
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if (p->is_64bit) {
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kvm_pr_unimpl(" { CRm(%2lu), Op1(%2lu), is64, func_%s },\n",
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p->CRm, p->Op1, p->is_write ? "write" : "read");
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} else {
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kvm_pr_unimpl(" { CRn(%2lu), CRm(%2lu), Op1(%2lu), Op2(%2lu), is32,"
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" func_%s },\n",
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p->CRn, p->CRm, p->Op1, p->Op2,
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p->is_write ? "write" : "read");
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}
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}
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static inline bool ignore_write(struct kvm_vcpu *vcpu,
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const struct coproc_params *p)
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{
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return true;
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}
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static inline bool read_zero(struct kvm_vcpu *vcpu,
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const struct coproc_params *p)
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{
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*vcpu_reg(vcpu, p->Rt1) = 0;
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return true;
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}
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static inline bool write_to_read_only(struct kvm_vcpu *vcpu,
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const struct coproc_params *params)
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{
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kvm_debug("CP15 write to read-only register at: %08lx\n",
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*vcpu_pc(vcpu));
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print_cp_instr(params);
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return false;
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}
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static inline bool read_from_write_only(struct kvm_vcpu *vcpu,
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const struct coproc_params *params)
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{
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kvm_debug("CP15 read to write-only register at: %08lx\n",
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*vcpu_pc(vcpu));
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print_cp_instr(params);
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return false;
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}
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/* Reset functions */
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static inline void reset_unknown(struct kvm_vcpu *vcpu,
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const struct coproc_reg *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= ARRAY_SIZE(vcpu->arch.cp15));
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vcpu->arch.cp15[r->reg] = 0xdecafbad;
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}
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static inline void reset_val(struct kvm_vcpu *vcpu, const struct coproc_reg *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= ARRAY_SIZE(vcpu->arch.cp15));
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vcpu->arch.cp15[r->reg] = r->val;
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}
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static inline void reset_unknown64(struct kvm_vcpu *vcpu,
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const struct coproc_reg *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg + 1 >= ARRAY_SIZE(vcpu->arch.cp15));
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vcpu->arch.cp15[r->reg] = 0xdecafbad;
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vcpu->arch.cp15[r->reg+1] = 0xd0c0ffee;
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}
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static inline int cmp_reg(const struct coproc_reg *i1,
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const struct coproc_reg *i2)
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{
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BUG_ON(i1 == i2);
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if (!i1)
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return 1;
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else if (!i2)
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return -1;
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if (i1->CRn != i2->CRn)
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return i1->CRn - i2->CRn;
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if (i1->is_64 != i2->is_64)
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return i2->is_64 - i1->is_64;
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if (i1->CRm != i2->CRm)
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return i1->CRm - i2->CRm;
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if (i1->Op1 != i2->Op1)
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return i1->Op1 - i2->Op1;
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return i1->Op2 - i2->Op2;
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}
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#define CRn(_x) .CRn = _x
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#define CRm(_x) .CRm = _x
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#define CRm64(_x) .CRn = _x, .CRm = 0
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#define Op1(_x) .Op1 = _x
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#define Op2(_x) .Op2 = _x
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#define is64 .is_64 = true
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#define is32 .is_64 = false
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#endif /* __ARM_KVM_COPROC_LOCAL_H__ */
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