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5f0fbf9eca
This is the minimum fixmap interface expected to be implemented by architectures supporting highmem. We have a second level page table already allocated and covering 0xfff00000-0xffffffff because the exception vector page is located at 0xffff0000, and various cache tricks already use some entries above 0xffff0000. Therefore the PTEs covering 0xfff00000-0xfffeffff are free to be used. However the XScale cache flushing code already uses virtual addresses between 0xfffe0000 and 0xfffeffff. So this reserves the 0xfff00000-0xfffdffff range for fixmap stuff. The Documentation/arm/memory.txt information is updated accordingly, including the information about the actual top of DMA memory mapping region which didn't match the code. Signed-off-by: Nicolas Pitre <nico@marvell.com>
42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
#ifndef _ASM_FIXMAP_H
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#define _ASM_FIXMAP_H
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/*
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* Nothing too fancy for now.
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*
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* On ARM we already have well known fixed virtual addresses imposed by
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* the architecture such as the vector page which is located at 0xffff0000,
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* therefore a second level page table is already allocated covering
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* 0xfff00000 upwards.
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*
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* The cache flushing code in proc-xscale.S uses the virtual area between
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* 0xfffe0000 and 0xfffeffff.
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*/
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#define FIXADDR_START 0xfff00000UL
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#define FIXADDR_TOP 0xfffe0000UL
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#define FIXADDR_SIZE (FIXADDR_TOP - FIXADDR_START)
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#define FIX_KMAP_BEGIN 0
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#define FIX_KMAP_END (FIXADDR_SIZE >> PAGE_SHIFT)
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#define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT))
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#define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT)
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extern void __this_fixmap_does_not_exist(void);
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static inline unsigned long fix_to_virt(const unsigned int idx)
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{
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if (idx >= FIX_KMAP_END)
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__this_fixmap_does_not_exist();
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return __fix_to_virt(idx);
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}
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static inline unsigned int virt_to_fix(const unsigned long vaddr)
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{
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BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
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return __virt_to_fix(vaddr);
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}
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#endif
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