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91ebc1facd
This will make subsequent refactoring easier to handle. Note: this patch is nowhere checkpatch clean. Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de> Reviewed-by: Bart Van Assche <bart.vanassche@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
155 lines
4.9 KiB
C
155 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _AHA1740_H
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/* $Id$
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*
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* Header file for the adaptec 1740 driver for Linux
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*
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* With minor revisions 3/31/93
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* Written and (C) 1992,1993 Brad McLean. See aha1740.c
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* for more info
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*
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*/
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#include <linux/types.h>
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#define SLOTSIZE 0x5c
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/* EISA configuration registers & values */
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#define HID0(base) (base + 0x0)
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#define HID1(base) (base + 0x1)
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#define HID2(base) (base + 0x2)
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#define HID3(base) (base + 0x3)
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#define EBCNTRL(base) (base + 0x4)
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#define PORTADR(base) (base + 0x40)
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#define BIOSADR(base) (base + 0x41)
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#define INTDEF(base) (base + 0x42)
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#define SCSIDEF(base) (base + 0x43)
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#define BUSDEF(base) (base + 0x44)
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#define RESV0(base) (base + 0x45)
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#define RESV1(base) (base + 0x46)
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#define RESV2(base) (base + 0x47)
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#define HID_MFG "ADP"
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#define HID_PRD 0
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#define HID_REV 2
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#define EBCNTRL_VALUE 1
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#define PORTADDR_ENH 0x80
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/* READ */
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#define G2INTST(base) (base + 0x56)
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#define G2STAT(base) (base + 0x57)
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#define MBOXIN0(base) (base + 0x58)
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#define MBOXIN1(base) (base + 0x59)
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#define MBOXIN2(base) (base + 0x5a)
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#define MBOXIN3(base) (base + 0x5b)
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#define G2STAT2(base) (base + 0x5c)
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#define G2INTST_MASK 0xf0 /* isolate the status */
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#define G2INTST_CCBGOOD 0x10 /* CCB Completed */
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#define G2INTST_CCBRETRY 0x50 /* CCB Completed with a retry */
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#define G2INTST_HARDFAIL 0x70 /* Adapter Hardware Failure */
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#define G2INTST_CMDGOOD 0xa0 /* Immediate command success */
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#define G2INTST_CCBERROR 0xc0 /* CCB Completed with error */
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#define G2INTST_ASNEVENT 0xd0 /* Asynchronous Event Notification */
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#define G2INTST_CMDERROR 0xe0 /* Immediate command error */
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#define G2STAT_MBXOUT 4 /* Mailbox Out Empty Bit */
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#define G2STAT_INTPEND 2 /* Interrupt Pending Bit */
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#define G2STAT_BUSY 1 /* Busy Bit (attention pending) */
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#define G2STAT2_READY 0 /* Host Ready Bit */
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/* WRITE (and ReadBack) */
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#define MBOXOUT0(base) (base + 0x50)
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#define MBOXOUT1(base) (base + 0x51)
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#define MBOXOUT2(base) (base + 0x52)
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#define MBOXOUT3(base) (base + 0x53)
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#define ATTN(base) (base + 0x54)
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#define G2CNTRL(base) (base + 0x55)
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#define ATTN_IMMED 0x10 /* Immediate Command */
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#define ATTN_START 0x40 /* Start CCB */
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#define ATTN_ABORT 0x50 /* Abort CCB */
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#define G2CNTRL_HRST 0x80 /* Hard Reset */
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#define G2CNTRL_IRST 0x40 /* Clear EISA Interrupt */
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#define G2CNTRL_HRDY 0x20 /* Sets HOST ready */
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/* This is used with scatter-gather */
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struct aha1740_chain {
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u32 dataptr; /* Location of data */
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u32 datalen; /* Size of this part of chain */
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};
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/* These belong in scsi.h */
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#define any2scsi(up, p) \
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(up)[0] = (((unsigned long)(p)) >> 16) ; \
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(up)[1] = (((unsigned long)(p)) >> 8); \
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(up)[2] = ((unsigned long)(p));
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#define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
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#define xany2scsi(up, p) \
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(up)[0] = ((long)(p)) >> 24; \
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(up)[1] = ((long)(p)) >> 16; \
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(up)[2] = ((long)(p)) >> 8; \
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(up)[3] = ((long)(p));
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#define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
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+ (((long)(up)[2]) << 8) + ((long)(up)[3]) )
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#define MAX_CDB 12
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#define MAX_SENSE 14
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#define MAX_STATUS 32
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struct ecb { /* Enhanced Control Block 6.1 */
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u16 cmdw; /* Command Word */
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/* Flag Word 1 */
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u16 cne:1, /* Control Block Chaining */
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:6, di:1, /* Disable Interrupt */
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:2, ses:1, /* Suppress Underrun error */
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:1, sg:1, /* Scatter/Gather */
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:1, dsb:1, /* Disable Status Block */
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ars:1; /* Automatic Request Sense */
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/* Flag Word 2 */
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u16 lun:3, /* Logical Unit */
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tag:1, /* Tagged Queuing */
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tt:2, /* Tag Type */
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nd:1, /* No Disconnect */
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:1, dat:1, /* Data transfer - check direction */
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dir:1, /* Direction of transfer 1 = datain */
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st:1, /* Suppress Transfer */
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chk:1, /* Calculate Checksum */
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:2, rec:1,:1; /* Error Recovery */
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u16 nil0; /* nothing */
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u32 dataptr; /* Data or Scatter List ptr */
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u32 datalen; /* Data or Scatter List len */
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u32 statusptr; /* Status Block ptr */
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u32 linkptr; /* Chain Address */
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u32 nil1; /* nothing */
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u32 senseptr; /* Sense Info Pointer */
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u8 senselen; /* Sense Length */
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u8 cdblen; /* CDB Length */
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u16 datacheck; /* Data checksum */
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u8 cdb[MAX_CDB]; /* CDB area */
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/* Hardware defined portion ends here, rest is driver defined */
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u8 sense[MAX_SENSE]; /* Sense area */
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u8 status[MAX_STATUS]; /* Status area */
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struct scsi_cmnd *SCpnt; /* Link to the SCSI Command Block */
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void (*done) (struct scsi_cmnd *); /* Completion Function */
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};
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#define AHA1740CMD_NOP 0x00 /* No OP */
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#define AHA1740CMD_INIT 0x01 /* Initiator SCSI Command */
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#define AHA1740CMD_DIAG 0x05 /* Run Diagnostic Command */
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#define AHA1740CMD_SCSI 0x06 /* Initialize SCSI */
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#define AHA1740CMD_SENSE 0x08 /* Read Sense Information */
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#define AHA1740CMD_DOWN 0x09 /* Download Firmware (yeah, I bet!) */
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#define AHA1740CMD_RINQ 0x0a /* Read Host Adapter Inquiry Data */
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#define AHA1740CMD_TARG 0x10 /* Target SCSI Command */
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#define AHA1740_ECBS 32
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#define AHA1740_SCATTER 16
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#endif
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