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32981ea5b9
Last CLPS711X CPU register is PLLR has 0xa5a8 address, so we can reduce the map to 48k and align the end of the static at VMALLOC_START. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
39 lines
935 B
ArmAsm
39 lines
935 B
ArmAsm
/*
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* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef CONFIG_DEBUG_CLPS711X_UART2
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#define CLPS711X_UART_PADDR (0x80000000 + 0x0000)
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#define CLPS711X_UART_VADDR (0xfeff4000 + 0x0000)
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#else
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#define CLPS711X_UART_PADDR (0x80000000 + 0x1000)
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#define CLPS711X_UART_VADDR (0xfeff4000 + 0x1000)
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#endif
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#define SYSFLG (0x0140)
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#define SYSFLG_UBUSY (1 << 11)
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#define UARTDR (0x0480)
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.macro addruart, rp, rv, tmp
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ldr \rv, =CLPS711X_UART_VADDR
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ldr \rp, =CLPS711X_UART_PADDR
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.endm
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.macro waituart,rd,rx
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.endm
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.macro senduart,rd,rx
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str \rd, [\rx, #UARTDR]
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #SYSFLG]
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tst \rd, #SYSFLG_UBUSY
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bne 1001b
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.endm
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