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e007c53397
Here we have another kind of deviation from the default case - a difference between exporting functions and non-functions. EXPORT_DATA_SYMBOL... is really different from EXPORT_SYMBOL... on ia64, and we need to use the right one when moving exports from *.c where C compiler has the required information to *.S, where we need to supply it manually. parisc64 will be another one like that. Tested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
99 lines
2.9 KiB
ArmAsm
99 lines
2.9 KiB
ArmAsm
/*
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* ESI call stub.
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*
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* Copyright (C) 2005 Hewlett-Packard Co
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* Alex Williamson <alex.williamson@hp.com>
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*
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* Based on EFI call stub by David Mosberger. The stub is virtually
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* identical to the one for EFI phys-mode calls, except that ESI
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* calls may have up to 8 arguments, so they get passed to this routine
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* through memory.
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*
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* This stub allows us to make ESI calls in physical mode with interrupts
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* turned off. ESI calls may not support calling from virtual mode.
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*
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* Google for "Extensible SAL specification" for a document describing the
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* ESI standard.
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*/
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/*
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* PSR settings as per SAL spec (Chapter 8 in the "IA-64 System
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* Abstraction Layer Specification", revision 2.6e). Note that
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* psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
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* Otherwise, SAL dies whenever it's trying to do an IA-32 BIOS call
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* (the br.ia instruction fails unless psr.dfl and psr.dfh are
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* cleared). Fortunately, SAL promises not to touch the floating
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* point regs, so at least we don't have to save f2-f127.
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*/
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#define PSR_BITS_TO_CLEAR \
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(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_RT | \
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IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | \
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IA64_PSR_DFL | IA64_PSR_DFH)
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#define PSR_BITS_TO_SET \
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(IA64_PSR_BN)
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#include <asm/processor.h>
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#include <asm/asmmacro.h>
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#include <asm/export.h>
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/*
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* Inputs:
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* in0 = address of function descriptor of ESI routine to call
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* in1 = address of array of ESI parameters
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*
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* Outputs:
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* r8 = result returned by called function
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*/
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GLOBAL_ENTRY(esi_call_phys)
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.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
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alloc loc1=ar.pfs,2,7,8,0
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ld8 r2=[in0],8 // load ESI function's entry point
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mov loc0=rp
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.body
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;;
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ld8 out0=[in1],8 // ESI params loaded from array
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;; // passing all as inputs doesn't work
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ld8 out1=[in1],8
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;;
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ld8 out2=[in1],8
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;;
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ld8 out3=[in1],8
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;;
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ld8 out4=[in1],8
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;;
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ld8 out5=[in1],8
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;;
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ld8 out6=[in1],8
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;;
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ld8 out7=[in1]
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mov loc2=gp // save global pointer
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mov loc4=ar.rsc // save RSE configuration
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mov ar.rsc=0 // put RSE in enforced lazy, LE mode
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;;
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ld8 gp=[in0] // load ESI function's global pointer
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movl r16=PSR_BITS_TO_CLEAR
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mov loc3=psr // save processor status word
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movl r17=PSR_BITS_TO_SET
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;;
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or loc3=loc3,r17
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mov b6=r2
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;;
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andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
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br.call.sptk.many rp=ia64_switch_mode_phys
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.ret0: mov loc5=r19 // old ar.bsp
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mov loc6=r20 // old sp
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br.call.sptk.many rp=b6 // call the ESI function
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.ret1: mov ar.rsc=0 // put RSE in enforced lazy, LE mode
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mov r16=loc3 // save virtual mode psr
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mov r19=loc5 // save virtual mode bspstore
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mov r20=loc6 // save virtual mode sp
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br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
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.ret2: mov ar.rsc=loc4 // restore RSE configuration
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mov ar.pfs=loc1
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mov rp=loc0
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mov gp=loc2
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br.ret.sptk.many rp
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END(esi_call_phys)
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EXPORT_SYMBOL_GPL(esi_call_phys)
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