Noam Camus b1f2f6f3cf ARC: [plat-eznps] Use dedicated SMP barriers ... NPS device got 256 cores and each got 16 HW threads (SMT). We use EZchip dedicated ISA to trigger HW scheduler of the core that current HW thread belongs to. This scheduling makes sure that data beyond barrier is available to all HW threads in core and by that to all in device (4K). Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org>		2016-05-09 09:32:33 +05:30
..
asm	ARC: [plat-eznps] Use dedicated SMP barriers	2016-05-09 09:32:33 +05:30
uapi/asm	ARC: clean out UAPI byteorder.h clean off Kconfig symbol	2016-05-09 09:32:31 +05:30