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https://github.com/edk2-porting/linux-next.git
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dfc53baae3
In the architecture independent version of hyperv-tlfs.h, commit c55a844f46
removed the "X64" in the symbol names so they would make sense for both x86 and
ARM64. That commit added aliases with the "X64" in the x86 version of hyperv-tlfs.h
so that existing x86 code would continue to compile.
As a cleanup, update the x86 code to use the symbols without the "X64", then remove
the aliases. There's no functional change.
Signed-off-by: Joseph Salisbury <joseph.salisbury@microsoft.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/1601130386-11111-1-git-send-email-jsalisbury@linux.microsoft.com
89 lines
2.2 KiB
C
89 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Hyper-V specific spinlock code.
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*
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* Copyright (C) 2018, Intel, Inc.
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*
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* Author : Yi Sun <yi.y.sun@intel.com>
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*/
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#define pr_fmt(fmt) "Hyper-V: " fmt
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#include <linux/spinlock.h>
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#include <asm/mshyperv.h>
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#include <asm/paravirt.h>
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#include <asm/apic.h>
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static bool __initdata hv_pvspin = true;
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static void hv_qlock_kick(int cpu)
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{
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apic->send_IPI(cpu, X86_PLATFORM_IPI_VECTOR);
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}
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static void hv_qlock_wait(u8 *byte, u8 val)
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{
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unsigned long msr_val;
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unsigned long flags;
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if (in_nmi())
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return;
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/*
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* Reading HV_X64_MSR_GUEST_IDLE MSR tells the hypervisor that the
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* vCPU can be put into 'idle' state. This 'idle' state is
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* terminated by an IPI, usually from hv_qlock_kick(), even if
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* interrupts are disabled on the vCPU.
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*
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* To prevent a race against the unlock path it is required to
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* disable interrupts before accessing the HV_X64_MSR_GUEST_IDLE
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* MSR. Otherwise, if the IPI from hv_qlock_kick() arrives between
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* the lock value check and the rdmsrl() then the vCPU might be put
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* into 'idle' state by the hypervisor and kept in that state for
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* an unspecified amount of time.
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*/
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local_irq_save(flags);
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/*
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* Only issue the rdmsrl() when the lock state has not changed.
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*/
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if (READ_ONCE(*byte) == val)
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rdmsrl(HV_X64_MSR_GUEST_IDLE, msr_val);
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local_irq_restore(flags);
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}
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/*
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* Hyper-V does not support this so far.
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*/
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__visible bool hv_vcpu_is_preempted(int vcpu)
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{
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return false;
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}
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PV_CALLEE_SAVE_REGS_THUNK(hv_vcpu_is_preempted);
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void __init hv_init_spinlocks(void)
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{
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if (!hv_pvspin || !apic ||
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!(ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) ||
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!(ms_hyperv.features & HV_MSR_GUEST_IDLE_AVAILABLE)) {
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pr_info("PV spinlocks disabled\n");
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return;
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}
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pr_info("PV spinlocks enabled\n");
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__pv_init_lock_hash();
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pv_ops.lock.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath;
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pv_ops.lock.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock);
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pv_ops.lock.wait = hv_qlock_wait;
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pv_ops.lock.kick = hv_qlock_kick;
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pv_ops.lock.vcpu_is_preempted = PV_CALLEE_SAVE(hv_vcpu_is_preempted);
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}
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static __init int hv_parse_nopvspin(char *arg)
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{
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hv_pvspin = false;
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return 0;
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}
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early_param("hv_nopvspin", hv_parse_nopvspin);
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