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6bb27d7349
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
89 lines
2.2 KiB
C
89 lines
2.2 KiB
C
/*
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* arch/arm/mach-mv78x00/rd78x00-masa-setup.c
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*
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* Marvell RD-78x00-mASA Development Board Setup
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ethtool.h>
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#include <mach/mv78xx0.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(8),
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};
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static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(9),
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};
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static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = {
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};
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static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = {
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};
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static struct mv_sata_platform_data rd78x00_masa_sata_data = {
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.n_ports = 2,
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};
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static void __init rd78x00_masa_init(void)
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{
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/*
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* Basic MV78x00 setup. Needs to be called early.
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*/
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mv78xx0_init();
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/*
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* Partition on-chip peripherals between the two CPU cores.
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*/
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if (mv78xx0_core_index() == 0) {
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mv78xx0_ehci0_init();
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mv78xx0_ehci1_init();
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mv78xx0_ge00_init(&rd78x00_masa_ge00_data);
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mv78xx0_ge10_init(&rd78x00_masa_ge10_data);
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mv78xx0_sata_init(&rd78x00_masa_sata_data);
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mv78xx0_uart0_init();
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mv78xx0_uart2_init();
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} else {
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mv78xx0_ehci2_init();
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mv78xx0_ge01_init(&rd78x00_masa_ge01_data);
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mv78xx0_ge11_init(&rd78x00_masa_ge11_data);
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mv78xx0_uart1_init();
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mv78xx0_uart3_init();
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}
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}
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static int __init rd78x00_pci_init(void)
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{
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/*
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* Assign all PCIe devices to CPU core #0.
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*/
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if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0)
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mv78xx0_pcie_init(1, 1);
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return 0;
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}
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subsys_initcall(rd78x00_pci_init);
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MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
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/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
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.atag_offset = 0x100,
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.init_machine = rd78x00_masa_init,
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.map_io = mv78xx0_map_io,
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.init_early = mv78xx0_init_early,
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.init_irq = mv78xx0_init_irq,
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.init_time = mv78xx0_timer_init,
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.restart = mv78xx0_restart,
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MACHINE_END
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