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b097186fd2
This patchset: PV guests under Xen are running in an non-contiguous memory architecture. When PCI pass-through is utilized, this necessitates an IOMMU for translating bus (DMA) to virtual and vice-versa and also providing a mechanism to have contiguous pages for device drivers operations (say DMA operations). Specifically, under Xen the Linux idea of pages is an illusion. It assumes that pages start at zero and go up to the available memory. To help with that, the Linux Xen MMU provides a lookup mechanism to translate the page frame numbers (PFN) to machine frame numbers (MFN) and vice-versa. The MFN are the "real" frame numbers. Furthermore memory is not contiguous. Xen hypervisor stitches memory for guests from different pools, which means there is no guarantee that PFN==MFN and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are allocated in descending order (high to low), meaning the guest might never get any MFN's under the 4GB mark. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Acked-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Albert Herranz <albert_herranz@yahoo.es> Cc: Ian Campbell <Ian.Campbell@citrix.com>
516 lines
14 KiB
C
516 lines
14 KiB
C
/*
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* Copyright 2010
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* by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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*
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* This code provides a IOMMU for Xen PV guests with PCI passthrough.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License v2.0 as published by
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* the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* PV guests under Xen are running in an non-contiguous memory architecture.
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*
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* When PCI pass-through is utilized, this necessitates an IOMMU for
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* translating bus (DMA) to virtual and vice-versa and also providing a
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* mechanism to have contiguous pages for device drivers operations (say DMA
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* operations).
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*
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* Specifically, under Xen the Linux idea of pages is an illusion. It
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* assumes that pages start at zero and go up to the available memory. To
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* help with that, the Linux Xen MMU provides a lookup mechanism to
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* translate the page frame numbers (PFN) to machine frame numbers (MFN)
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* and vice-versa. The MFN are the "real" frame numbers. Furthermore
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* memory is not contiguous. Xen hypervisor stitches memory for guests
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* from different pools, which means there is no guarantee that PFN==MFN
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* and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are
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* allocated in descending order (high to low), meaning the guest might
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* never get any MFN's under the 4GB mark.
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*
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*/
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#include <linux/bootmem.h>
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#include <linux/dma-mapping.h>
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#include <xen/swiotlb-xen.h>
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#include <xen/page.h>
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#include <xen/xen-ops.h>
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/*
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* Used to do a quick range check in swiotlb_tbl_unmap_single and
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* swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
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* API.
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*/
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static char *xen_io_tlb_start, *xen_io_tlb_end;
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static unsigned long xen_io_tlb_nslabs;
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/*
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* Quick lookup value of the bus address of the IOTLB.
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*/
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u64 start_dma_addr;
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static dma_addr_t xen_phys_to_bus(phys_addr_t paddr)
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{
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return phys_to_machine(XPADDR(paddr)).maddr;;
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}
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static phys_addr_t xen_bus_to_phys(dma_addr_t baddr)
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{
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return machine_to_phys(XMADDR(baddr)).paddr;
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}
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static dma_addr_t xen_virt_to_bus(void *address)
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{
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return xen_phys_to_bus(virt_to_phys(address));
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}
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static int check_pages_physically_contiguous(unsigned long pfn,
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unsigned int offset,
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size_t length)
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{
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unsigned long next_mfn;
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int i;
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int nr_pages;
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next_mfn = pfn_to_mfn(pfn);
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nr_pages = (offset + length + PAGE_SIZE-1) >> PAGE_SHIFT;
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for (i = 1; i < nr_pages; i++) {
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if (pfn_to_mfn(++pfn) != ++next_mfn)
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return 0;
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}
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return 1;
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}
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static int range_straddles_page_boundary(phys_addr_t p, size_t size)
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{
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unsigned long pfn = PFN_DOWN(p);
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unsigned int offset = p & ~PAGE_MASK;
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if (offset + size <= PAGE_SIZE)
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return 0;
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if (check_pages_physically_contiguous(pfn, offset, size))
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return 0;
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return 1;
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}
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static int is_xen_swiotlb_buffer(dma_addr_t dma_addr)
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{
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unsigned long mfn = PFN_DOWN(dma_addr);
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unsigned long pfn = mfn_to_local_pfn(mfn);
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phys_addr_t paddr;
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/* If the address is outside our domain, it CAN
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* have the same virtual address as another address
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* in our domain. Therefore _only_ check address within our domain.
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*/
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if (pfn_valid(pfn)) {
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paddr = PFN_PHYS(pfn);
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return paddr >= virt_to_phys(xen_io_tlb_start) &&
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paddr < virt_to_phys(xen_io_tlb_end);
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}
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return 0;
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}
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static int max_dma_bits = 32;
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static int
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xen_swiotlb_fixup(void *buf, size_t size, unsigned long nslabs)
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{
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int i, rc;
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int dma_bits;
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dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT;
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i = 0;
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do {
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int slabs = min(nslabs - i, (unsigned long)IO_TLB_SEGSIZE);
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do {
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rc = xen_create_contiguous_region(
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(unsigned long)buf + (i << IO_TLB_SHIFT),
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get_order(slabs << IO_TLB_SHIFT),
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dma_bits);
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} while (rc && dma_bits++ < max_dma_bits);
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if (rc)
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return rc;
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i += slabs;
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} while (i < nslabs);
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return 0;
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}
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void __init xen_swiotlb_init(int verbose)
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{
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unsigned long bytes;
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int rc;
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xen_io_tlb_nslabs = (64 * 1024 * 1024 >> IO_TLB_SHIFT);
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xen_io_tlb_nslabs = ALIGN(xen_io_tlb_nslabs, IO_TLB_SEGSIZE);
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bytes = xen_io_tlb_nslabs << IO_TLB_SHIFT;
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/*
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* Get IO TLB memory from any location.
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*/
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xen_io_tlb_start = alloc_bootmem(bytes);
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if (!xen_io_tlb_start)
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panic("Cannot allocate SWIOTLB buffer");
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xen_io_tlb_end = xen_io_tlb_start + bytes;
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/*
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* And replace that memory with pages under 4GB.
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*/
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rc = xen_swiotlb_fixup(xen_io_tlb_start,
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bytes,
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xen_io_tlb_nslabs);
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if (rc)
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goto error;
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start_dma_addr = xen_virt_to_bus(xen_io_tlb_start);
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swiotlb_init_with_tbl(xen_io_tlb_start, xen_io_tlb_nslabs, verbose);
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return;
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error:
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panic("DMA(%d): Failed to exchange pages allocated for DMA with Xen! "\
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"We either don't have the permission or you do not have enough"\
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"free memory under 4GB!\n", rc);
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}
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void *
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xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags)
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{
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void *ret;
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int order = get_order(size);
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u64 dma_mask = DMA_BIT_MASK(32);
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unsigned long vstart;
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/*
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* Ignore region specifiers - the kernel's ideas of
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* pseudo-phys memory layout has nothing to do with the
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* machine physical layout. We can't allocate highmem
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* because we can't return a pointer to it.
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*/
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flags &= ~(__GFP_DMA | __GFP_HIGHMEM);
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if (dma_alloc_from_coherent(hwdev, size, dma_handle, &ret))
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return ret;
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vstart = __get_free_pages(flags, order);
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ret = (void *)vstart;
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if (hwdev && hwdev->coherent_dma_mask)
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dma_mask = dma_alloc_coherent_mask(hwdev, flags);
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if (ret) {
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if (xen_create_contiguous_region(vstart, order,
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fls64(dma_mask)) != 0) {
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free_pages(vstart, order);
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return NULL;
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}
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memset(ret, 0, size);
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*dma_handle = virt_to_machine(ret).maddr;
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}
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return ret;
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_alloc_coherent);
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void
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xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
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dma_addr_t dev_addr)
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{
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int order = get_order(size);
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if (dma_release_from_coherent(hwdev, order, vaddr))
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return;
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xen_destroy_contiguous_region((unsigned long)vaddr, order);
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free_pages((unsigned long)vaddr, order);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_free_coherent);
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/*
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* Map a single buffer of the indicated size for DMA in streaming mode. The
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* physical address to use is returned.
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*
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* Once the device is given the dma address, the device owns this memory until
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* either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed.
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*/
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dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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phys_addr_t phys = page_to_phys(page) + offset;
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dma_addr_t dev_addr = xen_phys_to_bus(phys);
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void *map;
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BUG_ON(dir == DMA_NONE);
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/*
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* If the address happens to be in the device's DMA window,
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* we can safely return the device addr and not worry about bounce
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* buffering it.
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*/
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if (dma_capable(dev, dev_addr, size) &&
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!range_straddles_page_boundary(phys, size) && !swiotlb_force)
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return dev_addr;
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/*
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* Oh well, have to allocate and map a bounce buffer.
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*/
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map = swiotlb_tbl_map_single(dev, start_dma_addr, phys, size, dir);
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if (!map)
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return DMA_ERROR_CODE;
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dev_addr = xen_virt_to_bus(map);
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/*
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* Ensure that the address returned is DMA'ble
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*/
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if (!dma_capable(dev, dev_addr, size))
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panic("map_single: bounce buffer is not DMA'ble");
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return dev_addr;
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_map_page);
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/*
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* Unmap a single streaming mode DMA translation. The dma_addr and size must
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* match what was provided for in a previous xen_swiotlb_map_page call. All
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* other usages are undefined.
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*
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* After this call, reads by the cpu to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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static void xen_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir)
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{
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phys_addr_t paddr = xen_bus_to_phys(dev_addr);
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BUG_ON(dir == DMA_NONE);
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/* NOTE: We use dev_addr here, not paddr! */
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if (is_xen_swiotlb_buffer(dev_addr)) {
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swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
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return;
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}
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if (dir != DMA_FROM_DEVICE)
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return;
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/*
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* phys_to_virt doesn't work with hihgmem page but we could
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* call dma_mark_clean() with hihgmem page here. However, we
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* are fine since dma_mark_clean() is null on POWERPC. We can
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* make dma_mark_clean() take a physical address if necessary.
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*/
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dma_mark_clean(phys_to_virt(paddr), size);
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}
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void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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xen_unmap_single(hwdev, dev_addr, size, dir);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_unmap_page);
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/*
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* Make physical memory consistent for a single streaming mode DMA translation
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* after a transfer.
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*
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* If you perform a xen_swiotlb_map_page() but wish to interrogate the buffer
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* using the cpu, yet do not wish to teardown the dma mapping, you must
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* call this function before doing so. At the next point you give the dma
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* address back to the card, you must first perform a
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* xen_swiotlb_dma_sync_for_device, and then the device again owns the buffer
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*/
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static void
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xen_swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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enum dma_sync_target target)
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{
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phys_addr_t paddr = xen_bus_to_phys(dev_addr);
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BUG_ON(dir == DMA_NONE);
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/* NOTE: We use dev_addr here, not paddr! */
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if (is_xen_swiotlb_buffer(dev_addr)) {
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swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
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target);
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return;
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}
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if (dir != DMA_FROM_DEVICE)
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return;
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dma_mark_clean(phys_to_virt(paddr), size);
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}
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void
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xen_swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir)
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{
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xen_swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_sync_single_for_cpu);
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void
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xen_swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir)
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{
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xen_swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_sync_single_for_device);
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/*
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* Map a set of buffers described by scatterlist in streaming mode for DMA.
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* This is the scatter-gather version of the above xen_swiotlb_map_page
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* interface. Here the scatter gather list elements are each tagged with the
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* appropriate dma address and length. They are obtained via
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* sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for xen_swiotlb_map_page are the
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* same here.
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*/
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int
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xen_swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
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int nelems, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(dir == DMA_NONE);
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for_each_sg(sgl, sg, nelems, i) {
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phys_addr_t paddr = sg_phys(sg);
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dma_addr_t dev_addr = xen_phys_to_bus(paddr);
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if (swiotlb_force ||
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!dma_capable(hwdev, dev_addr, sg->length) ||
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range_straddles_page_boundary(paddr, sg->length)) {
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void *map = swiotlb_tbl_map_single(hwdev,
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start_dma_addr,
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sg_phys(sg),
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sg->length, dir);
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if (!map) {
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/* Don't panic here, we expect map_sg users
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to do proper error handling. */
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xen_swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
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attrs);
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sgl[0].dma_length = 0;
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return DMA_ERROR_CODE;
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}
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sg->dma_address = xen_virt_to_bus(map);
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} else
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sg->dma_address = dev_addr;
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sg->dma_length = sg->length;
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}
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return nelems;
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_map_sg_attrs);
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int
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xen_swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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return xen_swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_map_sg);
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/*
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* Unmap a set of streaming mode DMA translations. Again, cpu read rules
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* concerning calls here are the same as for swiotlb_unmap_page() above.
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*/
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void
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xen_swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
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int nelems, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(dir == DMA_NONE);
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for_each_sg(sgl, sg, nelems, i)
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xen_unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_unmap_sg_attrs);
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void
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xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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return xen_swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
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}
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EXPORT_SYMBOL_GPL(xen_swiotlb_unmap_sg);
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/*
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* Make physical memory consistent for a set of streaming mode DMA translations
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* after a transfer.
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*
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* The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
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* and usage.
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*/
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static void
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xen_swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
|
|
int nelems, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
struct scatterlist *sg;
|
|
int i;
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
|
xen_swiotlb_sync_single(hwdev, sg->dma_address,
|
|
sg->dma_length, dir, target);
|
|
}
|
|
|
|
void
|
|
xen_swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
xen_swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_swiotlb_sync_sg_for_cpu);
|
|
|
|
void
|
|
xen_swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
|
|
int nelems, enum dma_data_direction dir)
|
|
{
|
|
xen_swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_swiotlb_sync_sg_for_device);
|
|
|
|
int
|
|
xen_swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
|
|
{
|
|
return !dma_addr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_swiotlb_dma_mapping_error);
|
|
|
|
/*
|
|
* Return whether the given device DMA address mask can be supported
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask to
|
|
* this function.
|
|
*/
|
|
int
|
|
xen_swiotlb_dma_supported(struct device *hwdev, u64 mask)
|
|
{
|
|
return xen_virt_to_bus(xen_io_tlb_end - 1) <= mask;
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_swiotlb_dma_supported);
|