BOUGH CHEN af6a50d457 mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull ... i.MX6ULL has errata ERR010450, point out that due to SOC I/O timing limitation, for eMMC HS200 and SD/SDIO 3.0 SDR104, the clock rate can't exceed 150MHz. And for eMMC DDR52 and SD/SDIO DDR50 mode, the clock rate can't exceed 45MHz. This patch add this limit for imx6ull. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> [Ulf: Fixed comments and whitespace] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2019-02-25 08:40:58 +01:00
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core	mmc: block: handle complete_work on separate workqueue	2019-02-08 12:24:17 +01:00
host	mmc: sdhci-esdhc-imx: add SD clock limitation for imx6ull	2019-02-25 08:40:58 +01:00
Kconfig	mmc: core: Remove option not to use blk-mq	2017-12-11 12:55:02 +01:00
Makefile	mmc: Kconfig: downgrade CONFIG_MMC_DEBUG for host drivers only	2017-08-30 14:01:34 +02:00