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b8b572e101
from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where <asm-powepc/...> was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
43 lines
1.6 KiB
C
43 lines
1.6 KiB
C
/*
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* Contains register definitions common to PowerPC 8xx CPUs. Notice
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*/
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#ifndef _ASM_POWERPC_REG_8xx_H
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#define _ASM_POWERPC_REG_8xx_H
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/* Cache control on the MPC8xx is provided through some additional
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* special purpose registers.
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*/
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#define SPRN_IC_CST 560 /* Instruction cache control/status */
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#define SPRN_IC_ADR 561 /* Address needed for some commands */
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#define SPRN_IC_DAT 562 /* Read-only data register */
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#define SPRN_DC_CST 568 /* Data cache control/status */
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#define SPRN_DC_ADR 569 /* Address needed for some commands */
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#define SPRN_DC_DAT 570 /* Read-only data register */
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/* Commands. Only the first few are available to the instruction cache.
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*/
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#define IDC_ENABLE 0x02000000 /* Cache enable */
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#define IDC_DISABLE 0x04000000 /* Cache disable */
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#define IDC_LDLCK 0x06000000 /* Load and lock */
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#define IDC_UNLINE 0x08000000 /* Unlock line */
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#define IDC_UNALL 0x0a000000 /* Unlock all */
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#define IDC_INVALL 0x0c000000 /* Invalidate all */
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#define DC_FLINE 0x0e000000 /* Flush data cache line */
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#define DC_SFWT 0x01000000 /* Set forced writethrough mode */
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#define DC_CFWT 0x03000000 /* Clear forced writethrough mode */
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#define DC_SLES 0x05000000 /* Set little endian swap mode */
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#define DC_CLES 0x07000000 /* Clear little endian swap mode */
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/* Status.
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*/
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#define IDC_ENABLED 0x80000000 /* Cache is enabled */
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#define IDC_CERR1 0x00200000 /* Cache error 1 */
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#define IDC_CERR2 0x00100000 /* Cache error 2 */
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#define IDC_CERR3 0x00080000 /* Cache error 3 */
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#define DC_DFWT 0x40000000 /* Data cache is forced write through */
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#define DC_LES 0x20000000 /* Caches are little endian mode */
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#endif /* _ASM_POWERPC_REG_8xx_H */
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