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ae02e5d40d
This layer is responsible for - Enumerating over PCI bus - Inform FW about host readiness - Provide HW interface to transport layer for control and messages - Interrupt handling and routing Original-author: Daniel Drubin <daniel.drubin@intel.com> Reviewed-and-tested-by: Ooi, Joyce <joyce.ooi@intel.com> Tested-by: Grant Likely <grant.likely@secretlab.ca> Tested-by: Rann Bar-On <rb6@duke.edu> Tested-by: Atri Bhattacharya <badshah400@aim.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
19 lines
506 B
Makefile
19 lines
506 B
Makefile
#
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# Makefile - Intel ISH HID drivers
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# Copyright (c) 2014-2016, Intel Corporation.
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#
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#
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obj-$(CONFIG_INTEL_ISH_HID) += intel-ishtp.o
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intel-ishtp-objs := ishtp/init.o
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intel-ishtp-objs += ishtp/hbm.o
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intel-ishtp-objs += ishtp/client.o
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intel-ishtp-objs += ishtp/bus.o
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intel-ishtp-objs += ishtp/dma-if.o
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intel-ishtp-objs += ishtp/client-buffers.o
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obj-$(CONFIG_INTEL_ISH_HID) += intel-ish-ipc.o
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intel-ish-ipc-objs := ipc/ipc.o
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intel-ish-ipc-objs += ipc/pci-ish.o
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ccflags-y += -Idrivers/hid/intel-ish-hid/ishtp
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