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3bf725699b
Implement the hypervisor side of the KVM PTP interface. The service offers wall time and cycle count from host to guest. The caller must specify whether they want the host's view of either the virtual or physical counter. Signed-off-by: Jianyong Wu <jianyong.wu@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201209060932.212364-7-jianyong.wu@arm.com
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2019 Arm Ltd.
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#include <linux/arm-smccc.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_emulate.h>
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#include <kvm/arm_hypercalls.h>
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#include <kvm/arm_psci.h>
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static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val)
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{
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struct system_time_snapshot systime_snapshot;
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u64 cycles = ~0UL;
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u32 feature;
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/*
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* system time and counter value must captured at the same
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* time to keep consistency and precision.
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*/
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ktime_get_snapshot(&systime_snapshot);
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/*
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* This is only valid if the current clocksource is the
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* architected counter, as this is the only one the guest
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* can see.
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*/
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if (systime_snapshot.cs_id != CSID_ARM_ARCH_COUNTER)
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return;
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/*
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* The guest selects one of the two reference counters
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* (virtual or physical) with the first argument of the SMCCC
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* call. In case the identifier is not supported, error out.
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*/
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feature = smccc_get_arg1(vcpu);
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switch (feature) {
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case KVM_PTP_VIRT_COUNTER:
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cycles = systime_snapshot.cycles - vcpu_read_sys_reg(vcpu, CNTVOFF_EL2);
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break;
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case KVM_PTP_PHYS_COUNTER:
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cycles = systime_snapshot.cycles;
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break;
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default:
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return;
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}
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/*
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* This relies on the top bit of val[0] never being set for
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* valid values of system time, because that is *really* far
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* in the future (about 292 years from 1970, and at that stage
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* nobody will give a damn about it).
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*/
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val[0] = upper_32_bits(systime_snapshot.real);
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val[1] = lower_32_bits(systime_snapshot.real);
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val[2] = upper_32_bits(cycles);
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val[3] = lower_32_bits(cycles);
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}
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int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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{
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u32 func_id = smccc_get_function(vcpu);
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u64 val[4] = {SMCCC_RET_NOT_SUPPORTED};
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u32 feature;
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gpa_t gpa;
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switch (func_id) {
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case ARM_SMCCC_VERSION_FUNC_ID:
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val[0] = ARM_SMCCC_VERSION_1_1;
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break;
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case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
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feature = smccc_get_arg1(vcpu);
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switch (feature) {
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case ARM_SMCCC_ARCH_WORKAROUND_1:
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switch (arm64_get_spectre_v2_state()) {
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case SPECTRE_VULNERABLE:
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break;
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case SPECTRE_MITIGATED:
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val[0] = SMCCC_RET_SUCCESS;
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break;
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case SPECTRE_UNAFFECTED:
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val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED;
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break;
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}
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break;
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case ARM_SMCCC_ARCH_WORKAROUND_2:
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switch (arm64_get_spectre_v4_state()) {
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case SPECTRE_VULNERABLE:
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break;
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case SPECTRE_MITIGATED:
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/*
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* SSBS everywhere: Indicate no firmware
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* support, as the SSBS support will be
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* indicated to the guest and the default is
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* safe.
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*
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* Otherwise, expose a permanent mitigation
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* to the guest, and hide SSBS so that the
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* guest stays protected.
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*/
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if (cpus_have_final_cap(ARM64_SSBS))
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break;
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fallthrough;
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case SPECTRE_UNAFFECTED:
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val[0] = SMCCC_RET_NOT_REQUIRED;
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break;
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}
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break;
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case ARM_SMCCC_HV_PV_TIME_FEATURES:
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val[0] = SMCCC_RET_SUCCESS;
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break;
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}
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break;
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case ARM_SMCCC_HV_PV_TIME_FEATURES:
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val[0] = kvm_hypercall_pv_features(vcpu);
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break;
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case ARM_SMCCC_HV_PV_TIME_ST:
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gpa = kvm_init_stolen_time(vcpu);
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if (gpa != GPA_INVALID)
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val[0] = gpa;
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break;
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case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID:
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val[0] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0;
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val[1] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1;
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val[2] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2;
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val[3] = ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3;
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break;
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case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID:
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val[0] = BIT(ARM_SMCCC_KVM_FUNC_FEATURES);
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val[0] |= BIT(ARM_SMCCC_KVM_FUNC_PTP);
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break;
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case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID:
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kvm_ptp_get_time(vcpu, val);
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break;
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case ARM_SMCCC_TRNG_VERSION:
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case ARM_SMCCC_TRNG_FEATURES:
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case ARM_SMCCC_TRNG_GET_UUID:
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case ARM_SMCCC_TRNG_RND32:
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case ARM_SMCCC_TRNG_RND64:
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return kvm_trng_call(vcpu);
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default:
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return kvm_psci_call(vcpu);
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}
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smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]);
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return 1;
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}
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