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72dbb8c94d
Add support the VID_PLL fully programmable divider used right after the HDMI PLL clock source. It is used to achieve complex fractional division with a programmble bitfield. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: http://lkml.kernel.org/r/1541516257-16157-2-git-send-email-narmstrong@baylibre.com
13 lines
513 B
Makefile
13 lines
513 B
Makefile
#
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# Makefile for Meson specific clk
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#
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obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-phase.o vid-pll-div.o
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obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += clk-triphase.o sclk-div.o
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obj-$(CONFIG_COMMON_CLK_MESON_AO) += meson-aoclk.o
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obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
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obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o gxbb-aoclk-32k.o
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obj-$(CONFIG_COMMON_CLK_AXG) += axg.o axg-aoclk.o
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obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o
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obj-$(CONFIG_COMMON_CLK_REGMAP_MESON) += clk-regmap.o
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