mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 12:14:01 +08:00
d384d6f43d
Coreboot (http://www.coreboot.org) allows to save the firmware console output in a memory buffer. With this patch, the address of this memory buffer is obtained from coreboot tables on x86 chromebook devices declaring an ACPI device with name matching GOOGCB00 or BOOT0000. If the memconsole-coreboot driver is able to find the coreboot table, the memconsole driver sets the cbmem_console address and initializes the memconsole sysfs entries. The coreboot_table-acpi driver is responsible for setting the address of the coreboot table header when probed. If this address is not yet set when memconsole-coreboot is probed, then the probe is deferred by returning -EPROBE_DEFER. This patch is a rework/split/merge of patches from the chromeos v4.4 kernel tree originally authored by: Vadim Bendebury <vbendeb@chromium.org> Wei-Ning Huang <wnhuang@google.com> Yuji Sasaki <sasakiy@google.com> Duncan Laurie <dlaurie@chromium.org> Julius Werner <jwerner@chromium.org> Brian Norris <briannorris@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
110 lines
2.3 KiB
C
110 lines
2.3 KiB
C
/*
|
|
* memconsole-coreboot.c
|
|
*
|
|
* Memory based BIOS console accessed through coreboot table.
|
|
*
|
|
* Copyright 2017 Google Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License v2.0 as published by
|
|
* the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/module.h>
|
|
#include <linux/platform_device.h>
|
|
|
|
#include "memconsole.h"
|
|
#include "coreboot_table.h"
|
|
|
|
#define CB_TAG_CBMEM_CONSOLE 0x17
|
|
|
|
/* CBMEM firmware console log descriptor. */
|
|
struct cbmem_cons {
|
|
u32 buffer_size;
|
|
u32 buffer_cursor;
|
|
u8 buffer_body[0];
|
|
} __packed;
|
|
|
|
static struct cbmem_cons __iomem *cbmem_console;
|
|
|
|
static int memconsole_coreboot_init(phys_addr_t physaddr)
|
|
{
|
|
struct cbmem_cons __iomem *tmp_cbmc;
|
|
|
|
tmp_cbmc = memremap(physaddr, sizeof(*tmp_cbmc), MEMREMAP_WB);
|
|
|
|
if (!tmp_cbmc)
|
|
return -ENOMEM;
|
|
|
|
cbmem_console = memremap(physaddr,
|
|
tmp_cbmc->buffer_size + sizeof(*cbmem_console),
|
|
MEMREMAP_WB);
|
|
memunmap(tmp_cbmc);
|
|
|
|
if (!cbmem_console)
|
|
return -ENOMEM;
|
|
|
|
memconsole_setup(cbmem_console->buffer_body,
|
|
min(cbmem_console->buffer_cursor, cbmem_console->buffer_size));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int memconsole_probe(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
struct lb_cbmem_ref entry;
|
|
|
|
ret = coreboot_table_find(CB_TAG_CBMEM_CONSOLE, &entry, sizeof(entry));
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = memconsole_coreboot_init(entry.cbmem_addr);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return memconsole_sysfs_init();
|
|
}
|
|
|
|
static int memconsole_remove(struct platform_device *pdev)
|
|
{
|
|
memconsole_exit();
|
|
|
|
if (cbmem_console)
|
|
memunmap(cbmem_console);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver memconsole_driver = {
|
|
.probe = memconsole_probe,
|
|
.remove = memconsole_remove,
|
|
.driver = {
|
|
.name = "memconsole",
|
|
},
|
|
};
|
|
|
|
static int __init platform_memconsole_init(void)
|
|
{
|
|
struct platform_device *pdev;
|
|
|
|
pdev = platform_device_register_simple("memconsole", -1, NULL, 0);
|
|
if (pdev == NULL)
|
|
return -ENODEV;
|
|
|
|
platform_driver_register(&memconsole_driver);
|
|
|
|
return 0;
|
|
}
|
|
|
|
module_init(platform_memconsole_init);
|
|
|
|
MODULE_AUTHOR("Google, Inc.");
|
|
MODULE_LICENSE("GPL");
|