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9c1e105238
This provides a mechanism to allow the perf_counters code to access user memory in a PMU interrupt routine. Such an access can cause various kinds of interrupt: SLB miss, MMU hash table miss, segment table miss, or TLB miss, depending on the processor. This commit only deals with 64-bit classic/server processors, which use an MMU hash table. 32-bit processors are already able to access user memory at interrupt time. Since we don't soft-disable on 32-bit, we avoid the possibility of reentering hash_page or the TLB miss handlers, since they run with interrupts disabled. On 64-bit processors, an SLB miss interrupt on a user address will update the slb_cache and slb_cache_ptr fields in the paca. This is OK except in the case where a PMU interrupt occurs in switch_slb, which also accesses those fields. To prevent this, we hard-disable interrupts in switch_slb. Interrupts are already soft-disabled at this point, and will get hard-enabled when they get soft-enabled later. This also reworks slb_flush_and_rebolt: to avoid hard-disabling twice, and to make sure that it clears the slb_cache_ptr when called from other callers than switch_slb, the existing routine is renamed to __slb_flush_and_rebolt, which is called by switch_slb and the new version of slb_flush_and_rebolt. Similarly, switch_stab (used on POWER3 and RS64 processors) gets a hard_irq_disable() to protect the per-cpu variables used there and in ste_allocate. If a MMU hashtable miss interrupt occurs, normally we would call hash_page to look up the Linux PTE for the address and create a HPTE. However, hash_page is fairly complex and takes some locks, so to avoid the possibility of deadlock, we check the preemption count to see if we are in a (pseudo-)NMI handler, and if so, we don't call hash_page but instead treat it like a bad access that will get reported up through the exception table mechanism. An interrupt whose handler runs even though the interrupt occurred when soft-disabled (such as the PMU interrupt) is considered a pseudo-NMI handler, which should use nmi_enter()/nmi_exit() rather than irq_enter()/irq_exit(). Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org> |
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| .. | ||
| 40x_mmu.c | ||
| 44x_mmu.c | ||
| dma-noncoherent.c | ||
| fault.c | ||
| fsl_booke_mmu.c | ||
| gup.c | ||
| hash_low_32.S | ||
| hash_low_64.S | ||
| hash_native_64.c | ||
| hash_utils_64.c | ||
| highmem.c | ||
| hugetlbpage.c | ||
| init_32.c | ||
| init_64.c | ||
| Makefile | ||
| mem.c | ||
| mmap_64.c | ||
| mmu_context_hash32.c | ||
| mmu_context_hash64.c | ||
| mmu_context_nohash.c | ||
| mmu_decl.h | ||
| numa.c | ||
| pgtable_32.c | ||
| pgtable_64.c | ||
| pgtable.c | ||
| ppc_mmu_32.c | ||
| slb_low.S | ||
| slb.c | ||
| slice.c | ||
| stab.c | ||
| subpage-prot.c | ||
| tlb_hash32.c | ||
| tlb_hash64.c | ||
| tlb_nohash_low.S | ||
| tlb_nohash.c | ||