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a21e5e282b
ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/*
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* Copyright (C) 1996-2000 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the core hardware definitions of the EBSA-110.
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*/
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#ifndef CORE_H
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#define CORE_H
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/* Physical addresses/sizes */
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#define ISAMEM_PHYS 0xe0000000
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#define ISAMEM_SIZE 0x10000000
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#define ISAIO_PHYS 0xf0000000
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#define ISAIO_SIZE PGDIR_SIZE
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#define TRICK0_PHYS 0xf2000000
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#define TRICK0_SIZE PGDIR_SIZE
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#define TRICK1_PHYS 0xf2400000
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#define TRICK1_SIZE PGDIR_SIZE
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#define TRICK2_PHYS 0xf2800000
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#define TRICK3_PHYS 0xf2c00000
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#define TRICK3_SIZE PGDIR_SIZE
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#define TRICK4_PHYS 0xf3000000
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#define TRICK4_SIZE PGDIR_SIZE
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#define TRICK5_PHYS 0xf3400000
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#define TRICK6_PHYS 0xf3800000
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#define TRICK7_PHYS 0xf3c00000
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/* Virtual addresses */
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#define PIT_BASE IOMEM(0xfc000000) /* trick 0 */
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#define SOFT_BASE IOMEM(0xfd000000) /* trick 1 */
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#define IRQ_MASK IOMEM(0xfe000000) /* trick 3 - read */
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#define IRQ_MSET IOMEM(0xfe000000) /* trick 3 - write */
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#define IRQ_STAT IOMEM(0xff000000) /* trick 4 - read */
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#define IRQ_MCLR IOMEM(0xff000000) /* trick 4 - write */
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#endif
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