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ab128afce4
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Nizam Haider <nijamh@cdac.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
206 lines
5.2 KiB
C
206 lines
5.2 KiB
C
/*
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* Atheros AR71XX/AR724X/AR913X GPIO API support
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*
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* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio/driver.h>
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#include <linux/platform_data/gpio-ath79.h>
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#include <linux/of_device.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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struct ath79_gpio_ctrl {
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struct gpio_chip chip;
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void __iomem *base;
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spinlock_t lock;
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};
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#define to_ath79_gpio_ctrl(c) container_of(c, struct ath79_gpio_ctrl, chip)
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static void ath79_gpio_set_value(struct gpio_chip *chip,
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unsigned gpio, int value)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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if (value)
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__raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_SET);
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else
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__raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_CLEAR);
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}
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static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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return (__raw_readl(ctrl->base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
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}
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static int ath79_gpio_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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unsigned long flags;
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spin_lock_irqsave(&ctrl->lock, flags);
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__raw_writel(
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__raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) & ~BIT(offset),
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ctrl->base + AR71XX_GPIO_REG_OE);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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return 0;
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}
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static int ath79_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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unsigned long flags;
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spin_lock_irqsave(&ctrl->lock, flags);
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if (value)
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__raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_SET);
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else
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__raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_CLEAR);
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__raw_writel(
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__raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) | BIT(offset),
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ctrl->base + AR71XX_GPIO_REG_OE);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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return 0;
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}
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static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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unsigned long flags;
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spin_lock_irqsave(&ctrl->lock, flags);
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__raw_writel(
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__raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) | BIT(offset),
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ctrl->base + AR71XX_GPIO_REG_OE);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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return 0;
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}
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static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct ath79_gpio_ctrl *ctrl = to_ath79_gpio_ctrl(chip);
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unsigned long flags;
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spin_lock_irqsave(&ctrl->lock, flags);
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if (value)
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__raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_SET);
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else
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__raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_CLEAR);
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__raw_writel(
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__raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) & BIT(offset),
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ctrl->base + AR71XX_GPIO_REG_OE);
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spin_unlock_irqrestore(&ctrl->lock, flags);
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return 0;
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}
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static const struct gpio_chip ath79_gpio_chip = {
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.label = "ath79",
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.get = ath79_gpio_get_value,
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.set = ath79_gpio_set_value,
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.direction_input = ath79_gpio_direction_input,
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.direction_output = ath79_gpio_direction_output,
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.base = 0,
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};
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static const struct of_device_id ath79_gpio_of_match[] = {
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{ .compatible = "qca,ar7100-gpio" },
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{ .compatible = "qca,ar9340-gpio" },
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{},
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};
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static int ath79_gpio_probe(struct platform_device *pdev)
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{
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struct ath79_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct device_node *np = pdev->dev.of_node;
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struct ath79_gpio_ctrl *ctrl;
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struct resource *res;
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u32 ath79_gpio_count;
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bool oe_inverted;
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int err;
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ctrl = devm_kzalloc(&pdev->dev, sizeof(*ctrl), GFP_KERNEL);
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if (!ctrl)
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return -ENOMEM;
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if (np) {
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err = of_property_read_u32(np, "ngpios", &ath79_gpio_count);
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if (err) {
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dev_err(&pdev->dev, "ngpios property is not valid\n");
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return err;
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}
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if (ath79_gpio_count >= 32) {
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dev_err(&pdev->dev, "ngpios must be less than 32\n");
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return -EINVAL;
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}
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oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio");
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} else if (pdata) {
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ath79_gpio_count = pdata->ngpios;
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oe_inverted = pdata->oe_inverted;
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} else {
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dev_err(&pdev->dev, "No DT node or platform data found\n");
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return -EINVAL;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ctrl->base = devm_ioremap_nocache(
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&pdev->dev, res->start, resource_size(res));
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if (!ctrl->base)
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return -ENOMEM;
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spin_lock_init(&ctrl->lock);
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memcpy(&ctrl->chip, &ath79_gpio_chip, sizeof(ctrl->chip));
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ctrl->chip.parent = &pdev->dev;
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ctrl->chip.ngpio = ath79_gpio_count;
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if (oe_inverted) {
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ctrl->chip.direction_input = ar934x_gpio_direction_input;
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ctrl->chip.direction_output = ar934x_gpio_direction_output;
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}
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err = gpiochip_add(&ctrl->chip);
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if (err) {
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dev_err(&pdev->dev,
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"cannot add AR71xx GPIO chip, error=%d", err);
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return err;
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}
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return 0;
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}
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static struct platform_driver ath79_gpio_driver = {
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.driver = {
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.name = "ath79-gpio",
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.of_match_table = ath79_gpio_of_match,
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},
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.probe = ath79_gpio_probe,
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};
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module_platform_driver(ath79_gpio_driver);
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