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d3f5d551df
Most of the AM43x CM reg address offsets are with MSB bit '1' (on 16-bit value) leading to arithmetic miscalculations while calculating CLOCK ENABLE register's address because cm_inst field was a type of "const s16", so make it "const u16". Also modify relevant functions so as to take care of the above. [afzal@ti.com: fixup and cleanup] Signed-off-by: Ankur Kishore <a-kishore@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
44 lines
1.7 KiB
C
44 lines
1.7 KiB
C
/*
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* OMAP4 Clock Management (CM) function prototypes
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*
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* Copyright (C) 2010 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
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#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
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bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
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void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
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void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
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void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
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void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
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extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
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extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
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u16 clkctrl_offs);
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/*
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* In an ideal world, we would not export these low-level functions,
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* but this will probably take some time to fix properly
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*/
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u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
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void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx);
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u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
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u16 inst, s16 idx);
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u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst,
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s16 idx);
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u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
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s16 idx);
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extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
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u32 mask);
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extern void omap_cm_base_init(void);
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#endif
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