mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 07:04:00 +08:00
e7ef0b632e
The EXYNOS5410 clocks are statically listed and registered using the Samsung specific common clock helper functions. Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com> Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
34 lines
729 B
C
34 lines
729 B
C
#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H
|
|
#define _DT_BINDINGS_CLOCK_EXYNOS_5410_H
|
|
|
|
/* core clocks */
|
|
#define CLK_FIN_PLL 1
|
|
#define CLK_FOUT_APLL 2
|
|
#define CLK_FOUT_CPLL 3
|
|
#define CLK_FOUT_MPLL 4
|
|
#define CLK_FOUT_BPLL 5
|
|
#define CLK_FOUT_KPLL 6
|
|
|
|
/* gate for special clocks (sclk) */
|
|
#define CLK_SCLK_UART0 128
|
|
#define CLK_SCLK_UART1 129
|
|
#define CLK_SCLK_UART2 130
|
|
#define CLK_SCLK_UART3 131
|
|
#define CLK_SCLK_MMC0 132
|
|
#define CLK_SCLK_MMC1 133
|
|
#define CLK_SCLK_MMC2 134
|
|
|
|
/* gate clocks */
|
|
#define CLK_UART0 257
|
|
#define CLK_UART1 258
|
|
#define CLK_UART2 259
|
|
#define CLK_UART3 260
|
|
#define CLK_MCT 315
|
|
#define CLK_MMC0 351
|
|
#define CLK_MMC1 352
|
|
#define CLK_MMC2 353
|
|
|
|
#define CLK_NR_CLKS 512
|
|
|
|
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */
|