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aa87214319
The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15 and one for gpio 16 to 31. Actually only the lower IRQ is registered so register the second one. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
283 lines
6.2 KiB
C
283 lines
6.2 KiB
C
/*
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* Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
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* Copyright (C) 2010 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#include <mach/imx-uart.h>
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#include <mach/irqs.h>
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static struct resource uart0[] = {
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{
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.start = MX51_UART1_BASE_ADDR,
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.end = MX51_UART1_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_UART1,
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.end = MX51_MXC_INT_UART1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device0 = {
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.name = "imx-uart",
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.id = 0,
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.resource = uart0,
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.num_resources = ARRAY_SIZE(uart0),
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};
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static struct resource uart1[] = {
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{
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.start = MX51_UART2_BASE_ADDR,
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.end = MX51_UART2_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_UART2,
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.end = MX51_MXC_INT_UART2,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device1 = {
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.name = "imx-uart",
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.id = 1,
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.resource = uart1,
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.num_resources = ARRAY_SIZE(uart1),
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};
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static struct resource uart2[] = {
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{
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.start = MX51_UART3_BASE_ADDR,
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.end = MX51_UART3_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_UART3,
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.end = MX51_MXC_INT_UART3,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_uart_device2 = {
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.name = "imx-uart",
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.id = 2,
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.resource = uart2,
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.num_resources = ARRAY_SIZE(uart2),
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};
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static struct resource mxc_fec_resources[] = {
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{
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.start = MX51_MXC_FEC_BASE_ADDR,
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.end = MX51_MXC_FEC_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_FEC,
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.end = MX51_MXC_INT_FEC,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_fec_device = {
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.name = "fec",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_fec_resources),
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.resource = mxc_fec_resources,
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};
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static struct resource mxc_i2c0_resources[] = {
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{
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.start = MX51_I2C1_BASE_ADDR,
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.end = MX51_I2C1_BASE_ADDR + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_I2C1,
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.end = MX51_MXC_INT_I2C1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_i2c_device0 = {
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.name = "imx-i2c",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_i2c0_resources),
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.resource = mxc_i2c0_resources,
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};
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static struct resource mxc_i2c1_resources[] = {
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{
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.start = MX51_I2C2_BASE_ADDR,
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.end = MX51_I2C2_BASE_ADDR + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = MX51_MXC_INT_I2C2,
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.end = MX51_MXC_INT_I2C2,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_i2c_device1 = {
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.name = "imx-i2c",
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.id = 1,
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.num_resources = ARRAY_SIZE(mxc_i2c1_resources),
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.resource = mxc_i2c1_resources,
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};
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static struct resource mxc_hsi2c_resources[] = {
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{
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.start = MX51_HSI2C_DMA_BASE_ADDR,
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.end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX51_MXC_INT_HS_I2C,
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.end = MX51_MXC_INT_HS_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_hsi2c_device = {
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.name = "imx-i2c",
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.id = 2,
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.num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
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.resource = mxc_hsi2c_resources
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};
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static u64 usb_dma_mask = DMA_BIT_MASK(32);
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static struct resource usbotg_resources[] = {
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{
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.start = MX51_OTG_BASE_ADDR,
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.end = MX51_OTG_BASE_ADDR + 0x1ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX51_MXC_INT_USB_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* OTG gadget device */
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struct platform_device mxc_usbdr_udc_device = {
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.name = "fsl-usb2-udc",
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.id = -1,
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.num_resources = ARRAY_SIZE(usbotg_resources),
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.resource = usbotg_resources,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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struct platform_device mxc_usbdr_host_device = {
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.name = "mxc-ehci",
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.id = 0,
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.num_resources = ARRAY_SIZE(usbotg_resources),
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.resource = usbotg_resources,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource usbh1_resources[] = {
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{
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.start = MX51_OTG_BASE_ADDR + 0x200,
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.end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX51_MXC_INT_USB_H1,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_usbh1_device = {
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.name = "mxc-ehci",
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.id = 1,
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.num_resources = ARRAY_SIZE(usbh1_resources),
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.resource = usbh1_resources,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource mxc_wdt_resources[] = {
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{
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.start = MX51_WDOG_BASE_ADDR,
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.end = MX51_WDOG_BASE_ADDR + SZ_16K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device mxc_wdt = {
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.name = "imx2-wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_wdt_resources),
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.resource = mxc_wdt_resources,
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};
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static struct resource mxc_kpp_resources[] = {
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{
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.start = MX51_MXC_INT_KPP,
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.end = MX51_MXC_INT_KPP,
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.flags = IORESOURCE_IRQ,
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} , {
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.start = MX51_KPP_BASE_ADDR,
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.end = MX51_KPP_BASE_ADDR + 0x8 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device mxc_keypad_device = {
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.name = "imx-keypad",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_kpp_resources),
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.resource = mxc_kpp_resources,
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};
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static struct mxc_gpio_port mxc_gpio_ports[] = {
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{
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.chip.label = "gpio-0",
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.base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO1_LOW,
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.irq_high = MX51_MXC_INT_GPIO1_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START
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},
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{
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.chip.label = "gpio-1",
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.base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO2_LOW,
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.irq_high = MX51_MXC_INT_GPIO2_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
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},
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{
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.chip.label = "gpio-2",
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.base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO3_LOW,
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.irq_high = MX51_MXC_INT_GPIO3_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
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},
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{
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.chip.label = "gpio-3",
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.base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO4_LOW,
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.irq_high = MX51_MXC_INT_GPIO4_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
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},
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};
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int __init imx51_register_gpios(void)
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{
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return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
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}
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