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9a2ac2dcdc
The majority of the code in this driver is licensed under the GPL v2, so relicense the rest under GPL v2 as well for consistency. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
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* Copyright (C) 2013 NVIDIA Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef DRM_TEGRA_MIPI_PHY_H
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#define DRM_TEGRA_MIPI_PHY_H
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/*
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* D-PHY timing parameters
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*
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* A detailed description of these parameters can be found in the MIPI
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* Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing
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* Parameters".
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*
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* All parameters are specified in nanoseconds.
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*/
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struct mipi_dphy_timing {
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unsigned int clkmiss;
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unsigned int clkpost;
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unsigned int clkpre;
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unsigned int clkprepare;
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unsigned int clksettle;
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unsigned int clktermen;
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unsigned int clktrail;
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unsigned int clkzero;
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unsigned int dtermen;
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unsigned int eot;
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unsigned int hsexit;
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unsigned int hsprepare;
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unsigned int hszero;
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unsigned int hssettle;
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unsigned int hsskip;
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unsigned int hstrail;
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unsigned int init;
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unsigned int lpx;
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unsigned int taget;
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unsigned int tago;
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unsigned int tasure;
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unsigned int wakeup;
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};
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int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
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unsigned long period);
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int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
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unsigned long period);
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#endif
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