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89e45aac42
Lengths and types of breakpoints are encoded in a half byte into CPU registers. However when we extract these values and store them, we add a high half byte part to them: 0x40 to the length and 0x80 to the type. When that gets reloaded to the CPU registers, the high part is masked. While making the instruction breakpoints available for perf, I zapped that high part on instruction breakpoint encoding and that broke the arch -> generic translation used by ptrace instruction breakpoints. Writing dr7 to set an inst breakpoint was then failing. There is no apparent reason for these high parts so we could get rid of them altogether. That's an invasive change though so let's do that later and for now fix the problem by restoring that inst breakpoint high part encoding in this sole patch. Reported-by: Kelvie Wong <kelvie@ieee.org> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Prasad <prasad@linux.vnet.ibm.com> Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Cc: Will Deacon <will.deacon@arm.com>
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
#ifndef _I386_HW_BREAKPOINT_H
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#define _I386_HW_BREAKPOINT_H
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#ifdef __KERNEL__
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#define __ARCH_HW_BREAKPOINT_H
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/*
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* The name should probably be something dealt in
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* a higher level. While dealing with the user
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* (display/resolving)
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*/
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struct arch_hw_breakpoint {
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unsigned long address;
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u8 len;
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u8 type;
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};
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#include <linux/kdebug.h>
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#include <linux/percpu.h>
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#include <linux/list.h>
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/* Available HW breakpoint length encodings */
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#define X86_BREAKPOINT_LEN_X 0x40
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#define X86_BREAKPOINT_LEN_1 0x40
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#define X86_BREAKPOINT_LEN_2 0x44
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#define X86_BREAKPOINT_LEN_4 0x4c
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#ifdef CONFIG_X86_64
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#define X86_BREAKPOINT_LEN_8 0x48
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#endif
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/* Available HW breakpoint type encodings */
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/* trigger on instruction execute */
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#define X86_BREAKPOINT_EXECUTE 0x80
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/* trigger on memory write */
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#define X86_BREAKPOINT_WRITE 0x81
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/* trigger on memory read or write */
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#define X86_BREAKPOINT_RW 0x83
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/* Total number of available HW breakpoint registers */
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#define HBP_NUM 4
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static inline int hw_breakpoint_slots(int type)
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{
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return HBP_NUM;
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}
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struct perf_event;
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struct pmu;
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extern int arch_check_bp_in_kernelspace(struct perf_event *bp);
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extern int arch_validate_hwbkpt_settings(struct perf_event *bp);
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extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
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unsigned long val, void *data);
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int arch_install_hw_breakpoint(struct perf_event *bp);
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void arch_uninstall_hw_breakpoint(struct perf_event *bp);
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void hw_breakpoint_pmu_read(struct perf_event *bp);
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void hw_breakpoint_pmu_unthrottle(struct perf_event *bp);
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extern void
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arch_fill_perf_breakpoint(struct perf_event *bp);
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unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type);
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int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type);
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extern int arch_bp_generic_fields(int x86_len, int x86_type,
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int *gen_len, int *gen_type);
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extern struct pmu perf_ops_bp;
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#endif /* __KERNEL__ */
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#endif /* _I386_HW_BREAKPOINT_H */
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