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https://github.com/edk2-porting/linux-next.git
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9088276d1a
The suniv F1C100s chip (several new F-series SoCs) of Allwinner has a pin controller like other SoCs from Allwinner. Add support for it. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
93 lines
1.6 KiB
Plaintext
93 lines
1.6 KiB
Plaintext
if ARCH_SUNXI
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config PINCTRL_SUNXI
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bool
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB
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config PINCTRL_SUNIV_F1C100S
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def_bool MACH_SUNIV
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select PINCTRL_SUNXI
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config PINCTRL_SUN4I_A10
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def_bool MACH_SUN4I || MACH_SUN7I || MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN5I
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def_bool MACH_SUN5I
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select PINCTRL_SUNXI
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config PINCTRL_SUN6I_A31
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def_bool MACH_SUN6I
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select PINCTRL_SUNXI
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config PINCTRL_SUN6I_A31_R
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def_bool MACH_SUN6I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A23
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A33
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A83T
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A83T_R
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A23_R
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def_bool MACH_SUN8I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_H3
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_H3_R
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def_bool MACH_SUN8I || (ARM64 && ARCH_SUNXI)
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_V3S
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN9I_A80
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def_bool MACH_SUN9I
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select PINCTRL_SUNXI
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config PINCTRL_SUN9I_A80_R
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def_bool MACH_SUN9I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_A64
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_A64_R
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_H5
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_H6
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_H6_R
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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endif
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