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linux-next/drivers/usb/host/xhci-ext-caps.c
Hans de Goede fa31b3cb2a xhci: Add Intel extended cap / otg phy mux handling
The xHCI controller on various Intel SoCs has an extended cap mmio-range
which contains registers to control the muxing to the xHCI (host mode)
or the dwc3 (device mode) and vbus-detection for the otg usb-phy.

Having a role-sw driver included in the xHCI code (under drivers/usb/host)
is not desirable. So this commit adds a simple handler for this extended
capability, which creates a platform device with the caps mmio region as
resource, this allows us to write a separate platform role-sw driver for
the role-switch.

Note this commit adds a call to the new xhci_ext_cap_init() function
to xhci_pci_probe(), it is added here because xhci_ext_cap_init() must
be called only once. If in the future we also want to handle ext-caps
on non pci xHCI HCDs from xhci_ext_cap_init() a call to it should also
be added to other bus probe paths.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-22 13:40:10 +01:00

91 lines
2.0 KiB
C

// SPDX-License-Identifier: GPL-2.0
/*
* XHCI extended capability handling
*
* Copyright (c) 2017 Hans de Goede <hdegoede@redhat.com>
*/
#include <linux/platform_device.h>
#include "xhci.h"
#define USB_SW_DRV_NAME "intel_xhci_usb_sw"
#define USB_SW_RESOURCE_SIZE 0x400
static void xhci_intel_unregister_pdev(void *arg)
{
platform_device_unregister(arg);
}
static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset)
{
struct usb_hcd *hcd = xhci_to_hcd(xhci);
struct device *dev = hcd->self.controller;
struct platform_device *pdev;
struct resource res = { 0, };
int ret;
pdev = platform_device_alloc(USB_SW_DRV_NAME, PLATFORM_DEVID_NONE);
if (!pdev) {
xhci_err(xhci, "couldn't allocate %s platform device\n",
USB_SW_DRV_NAME);
return -ENOMEM;
}
res.start = hcd->rsrc_start + cap_offset;
res.end = res.start + USB_SW_RESOURCE_SIZE - 1;
res.name = USB_SW_DRV_NAME;
res.flags = IORESOURCE_MEM;
ret = platform_device_add_resources(pdev, &res, 1);
if (ret) {
dev_err(dev, "couldn't add resources to intel_xhci_usb_sw pdev\n");
platform_device_put(pdev);
return ret;
}
pdev->dev.parent = dev;
ret = platform_device_add(pdev);
if (ret) {
dev_err(dev, "couldn't register intel_xhci_usb_sw pdev\n");
platform_device_put(pdev);
return ret;
}
ret = devm_add_action_or_reset(dev, xhci_intel_unregister_pdev, pdev);
if (ret) {
dev_err(dev, "couldn't add unregister action for intel_xhci_usb_sw pdev\n");
return ret;
}
return 0;
}
int xhci_ext_cap_init(struct xhci_hcd *xhci)
{
void __iomem *base = &xhci->cap_regs->hc_capbase;
u32 offset, val;
int ret;
offset = xhci_find_next_ext_cap(base, 0, 0);
while (offset) {
val = readl(base + offset);
switch (XHCI_EXT_CAPS_ID(val)) {
case XHCI_EXT_CAPS_VENDOR_INTEL:
if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) {
ret = xhci_create_intel_xhci_sw_pdev(xhci,
offset);
if (ret)
return ret;
}
break;
}
offset = xhci_find_next_ext_cap(base, offset, 0);
}
return 0;
}
EXPORT_SYMBOL_GPL(xhci_ext_cap_init);