Alison Schofield a7bfaad54b cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge ports ... During CXL ACPI probe, host bridge ports are discovered by scanning the ACPI0017 root port for ACPI0016 host bridge devices. The scan matches on the hardware id of "ACPI0016". An issue occurs when an ACPI0016 device is defined in the DSDT yet disabled on the platform. Attempts by the cxl_acpi driver to add host bridge ports using a disabled device fails, and the entire cxl_acpi probe fails. The DSDT table includes an _STA method that sets the status and the ACPI subsystem has checks available to examine it. One such check is in the acpi_pci_find_root() path. Move the call to acpi_pci_find_root() to the matching function to prevent this issue when adding either upstream or downstream ports. Suggested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Alison Schofield <alison.schofield@intel.com> Fixes: 7d4b5ca2e2 ("cxl/acpi: Add downstream port data to cxl_port instances") Cc: <stable@vger.kernel.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/163072203957.2250120.2178685721061002124.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>		2021-09-07 11:39:01 -07:00
..
core	cxl/core: Move memdev management to core	2021-08-06 08:22:54 -07:00
acpi.c	cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge ports	2021-09-07 11:39:01 -07:00
cxl.h	cxl/pci: Simplify register setup	2021-08-06 08:27:02 -07:00
cxlmem.h	cxl/mem: Account for partitionable space in ram/pmem ranges	2021-08-10 11:57:59 -07:00
Kconfig	cxl/pmem: Add initial infrastructure for pmem support	2021-06-15 16:47:14 -07:00
Makefile	cxl: Move cxl_core to new directory	2021-08-06 08:22:53 -07:00
pci.c	cxl/mem: Adjust ram/pmem range to represent DPA ranges	2021-08-10 18:50:04 -07:00
pci.h	cxl/pci: Simplify register setup	2021-08-06 08:27:02 -07:00
pmem.c	cxl: Move cxl_core to new directory	2021-08-06 08:22:53 -07:00