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acde25726b
POWER9 running a radix guest will take some hypervisor interrupts without going to real mode (turning off the MMU). This means that early hypercall handlers may now be called in virtual mode. Most of the handlers work just fine in both modes, but there are some that can crash the host if called in virtual mode, notably the TCE (IOMMU) hypercalls H_PUT_TCE, H_STUFF_TCE and H_PUT_TCE_INDIRECT. These already have both a real-mode and a virtual-mode version, so we arrange for the real-mode version to return H_TOO_HARD for radix guests, which will result in the virtual-mode version being called. The other hypercall which is sensitive to the MMU mode is H_RANDOM. It doesn't have a virtual-mode version, so this adds code to enable it to be called in either mode. An alternative solution was considered which would refuse to call any of the early hypercall handlers when doing a virtual-mode exit from a radix guest. However, the XICS-on-XIVE code depends on the XICS hypercalls being handled early even for virtual-mode exits, because the handlers need to be called before the XIVE vCPU state has been pulled off the hardware. Therefore that solution would have become quite invasive and complicated, and was rejected in favour of the simpler, though less elegant, solution presented here. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Tested-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
571 lines
14 KiB
C
571 lines
14 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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* Copyright 2011 David Gibson, IBM Corporation <dwg@au1.ibm.com>
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* Copyright 2016 Alexey Kardashevskiy, IBM Corporation <aik@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <linux/list.h>
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#include <asm/tlbflush.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/book3s/64/mmu-hash.h>
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#include <asm/mmu_context.h>
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#include <asm/hvcall.h>
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#include <asm/synch.h>
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#include <asm/ppc-opcode.h>
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#include <asm/kvm_host.h>
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#include <asm/udbg.h>
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#include <asm/iommu.h>
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#include <asm/tce.h>
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#ifdef CONFIG_BUG
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#define WARN_ON_ONCE_RM(condition) ({ \
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static bool __section(.data.unlikely) __warned; \
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int __ret_warn_once = !!(condition); \
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\
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if (unlikely(__ret_warn_once && !__warned)) { \
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__warned = true; \
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pr_err("WARN_ON_ONCE_RM: (%s) at %s:%u\n", \
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__stringify(condition), \
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__func__, __LINE__); \
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dump_stack(); \
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} \
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unlikely(__ret_warn_once); \
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})
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#else
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#define WARN_ON_ONCE_RM(condition) ({ \
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int __ret_warn_on = !!(condition); \
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unlikely(__ret_warn_on); \
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})
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#endif
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#define TCES_PER_PAGE (PAGE_SIZE / sizeof(u64))
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/*
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* Finds a TCE table descriptor by LIOBN.
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*
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* WARNING: This will be called in real or virtual mode on HV KVM and virtual
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* mode on PR KVM
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*/
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struct kvmppc_spapr_tce_table *kvmppc_find_table(struct kvm *kvm,
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unsigned long liobn)
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{
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struct kvmppc_spapr_tce_table *stt;
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list_for_each_entry_lockless(stt, &kvm->arch.spapr_tce_tables, list)
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if (stt->liobn == liobn)
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return stt;
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return NULL;
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}
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EXPORT_SYMBOL_GPL(kvmppc_find_table);
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/*
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* Validates TCE address.
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* At the moment flags and page mask are validated.
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* As the host kernel does not access those addresses (just puts them
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* to the table and user space is supposed to process them), we can skip
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* checking other things (such as TCE is a guest RAM address or the page
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* was actually allocated).
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*
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* WARNING: This will be called in real-mode on HV KVM and virtual
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* mode on PR KVM
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*/
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long kvmppc_tce_validate(struct kvmppc_spapr_tce_table *stt, unsigned long tce)
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{
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unsigned long gpa = tce & ~(TCE_PCI_READ | TCE_PCI_WRITE);
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enum dma_data_direction dir = iommu_tce_direction(tce);
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/* Allow userspace to poison TCE table */
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if (dir == DMA_NONE)
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return H_SUCCESS;
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if (iommu_tce_check_gpa(stt->page_shift, gpa))
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return H_PARAMETER;
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return H_SUCCESS;
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}
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EXPORT_SYMBOL_GPL(kvmppc_tce_validate);
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/* Note on the use of page_address() in real mode,
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*
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* It is safe to use page_address() in real mode on ppc64 because
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* page_address() is always defined as lowmem_page_address()
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* which returns __va(PFN_PHYS(page_to_pfn(page))) which is arithmetic
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* operation and does not access page struct.
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*
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* Theoretically page_address() could be defined different
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* but either WANT_PAGE_VIRTUAL or HASHED_PAGE_VIRTUAL
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* would have to be enabled.
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* WANT_PAGE_VIRTUAL is never enabled on ppc32/ppc64,
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* HASHED_PAGE_VIRTUAL could be enabled for ppc32 only and only
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* if CONFIG_HIGHMEM is defined. As CONFIG_SPARSEMEM_VMEMMAP
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* is not expected to be enabled on ppc32, page_address()
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* is safe for ppc32 as well.
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*
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* WARNING: This will be called in real-mode on HV KVM and virtual
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* mode on PR KVM
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*/
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static u64 *kvmppc_page_address(struct page *page)
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{
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#if defined(HASHED_PAGE_VIRTUAL) || defined(WANT_PAGE_VIRTUAL)
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#error TODO: fix to avoid page_address() here
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#endif
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return (u64 *) page_address(page);
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}
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/*
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* Handles TCE requests for emulated devices.
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* Puts guest TCE values to the table and expects user space to convert them.
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* Called in both real and virtual modes.
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* Cannot fail so kvmppc_tce_validate must be called before it.
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*
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* WARNING: This will be called in real-mode on HV KVM and virtual
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* mode on PR KVM
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*/
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void kvmppc_tce_put(struct kvmppc_spapr_tce_table *stt,
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unsigned long idx, unsigned long tce)
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{
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struct page *page;
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u64 *tbl;
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idx -= stt->offset;
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page = stt->pages[idx / TCES_PER_PAGE];
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tbl = kvmppc_page_address(page);
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tbl[idx % TCES_PER_PAGE] = tce;
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}
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EXPORT_SYMBOL_GPL(kvmppc_tce_put);
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long kvmppc_gpa_to_ua(struct kvm *kvm, unsigned long gpa,
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unsigned long *ua, unsigned long **prmap)
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{
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unsigned long gfn = gpa >> PAGE_SHIFT;
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struct kvm_memory_slot *memslot;
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memslot = search_memslots(kvm_memslots(kvm), gfn);
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if (!memslot)
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return -EINVAL;
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*ua = __gfn_to_hva_memslot(memslot, gfn) |
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(gpa & ~(PAGE_MASK | TCE_PCI_READ | TCE_PCI_WRITE));
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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if (prmap)
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*prmap = &memslot->arch.rmap[gfn - memslot->base_gfn];
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#endif
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return 0;
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}
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EXPORT_SYMBOL_GPL(kvmppc_gpa_to_ua);
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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static void kvmppc_rm_clear_tce(struct iommu_table *tbl, unsigned long entry)
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{
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unsigned long hpa = 0;
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enum dma_data_direction dir = DMA_NONE;
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iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
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}
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static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm,
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struct iommu_table *tbl, unsigned long entry)
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{
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struct mm_iommu_table_group_mem_t *mem = NULL;
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const unsigned long pgsize = 1ULL << tbl->it_page_shift;
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unsigned long *pua = IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry);
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if (!pua)
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/* it_userspace allocation might be delayed */
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return H_TOO_HARD;
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pua = (void *) vmalloc_to_phys(pua);
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if (WARN_ON_ONCE_RM(!pua))
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return H_HARDWARE;
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mem = mm_iommu_lookup_rm(kvm->mm, *pua, pgsize);
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if (!mem)
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return H_TOO_HARD;
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mm_iommu_mapped_dec(mem);
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*pua = 0;
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return H_SUCCESS;
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}
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static long kvmppc_rm_tce_iommu_unmap(struct kvm *kvm,
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struct iommu_table *tbl, unsigned long entry)
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{
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enum dma_data_direction dir = DMA_NONE;
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unsigned long hpa = 0;
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long ret;
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if (iommu_tce_xchg_rm(tbl, entry, &hpa, &dir))
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/*
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* real mode xchg can fail if struct page crosses
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* a page boundary
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*/
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return H_TOO_HARD;
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if (dir == DMA_NONE)
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return H_SUCCESS;
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ret = kvmppc_rm_tce_iommu_mapped_dec(kvm, tbl, entry);
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if (ret)
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iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
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return ret;
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}
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static long kvmppc_rm_tce_iommu_map(struct kvm *kvm, struct iommu_table *tbl,
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unsigned long entry, unsigned long ua,
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enum dma_data_direction dir)
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{
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long ret;
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unsigned long hpa = 0;
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unsigned long *pua = IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry);
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struct mm_iommu_table_group_mem_t *mem;
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if (!pua)
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/* it_userspace allocation might be delayed */
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return H_TOO_HARD;
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mem = mm_iommu_lookup_rm(kvm->mm, ua, 1ULL << tbl->it_page_shift);
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if (!mem)
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return H_TOO_HARD;
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if (WARN_ON_ONCE_RM(mm_iommu_ua_to_hpa_rm(mem, ua, &hpa)))
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return H_HARDWARE;
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pua = (void *) vmalloc_to_phys(pua);
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if (WARN_ON_ONCE_RM(!pua))
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return H_HARDWARE;
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if (WARN_ON_ONCE_RM(mm_iommu_mapped_inc(mem)))
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return H_CLOSED;
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ret = iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
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if (ret) {
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mm_iommu_mapped_dec(mem);
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/*
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* real mode xchg can fail if struct page crosses
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* a page boundary
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*/
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return H_TOO_HARD;
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}
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if (dir != DMA_NONE)
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kvmppc_rm_tce_iommu_mapped_dec(kvm, tbl, entry);
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*pua = ua;
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return 0;
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}
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long kvmppc_rm_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
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unsigned long ioba, unsigned long tce)
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{
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struct kvmppc_spapr_tce_table *stt;
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long ret;
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struct kvmppc_spapr_tce_iommu_table *stit;
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unsigned long entry, ua = 0;
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enum dma_data_direction dir;
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/* udbg_printf("H_PUT_TCE(): liobn=0x%lx ioba=0x%lx, tce=0x%lx\n", */
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/* liobn, ioba, tce); */
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/* For radix, we might be in virtual mode, so punt */
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if (kvm_is_radix(vcpu->kvm))
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return H_TOO_HARD;
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stt = kvmppc_find_table(vcpu->kvm, liobn);
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if (!stt)
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return H_TOO_HARD;
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ret = kvmppc_ioba_validate(stt, ioba, 1);
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if (ret != H_SUCCESS)
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return ret;
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ret = kvmppc_tce_validate(stt, tce);
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if (ret != H_SUCCESS)
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return ret;
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dir = iommu_tce_direction(tce);
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if ((dir != DMA_NONE) && kvmppc_gpa_to_ua(vcpu->kvm,
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tce & ~(TCE_PCI_READ | TCE_PCI_WRITE), &ua, NULL))
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return H_PARAMETER;
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entry = ioba >> stt->page_shift;
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list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
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if (dir == DMA_NONE)
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ret = kvmppc_rm_tce_iommu_unmap(vcpu->kvm,
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stit->tbl, entry);
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else
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ret = kvmppc_rm_tce_iommu_map(vcpu->kvm,
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stit->tbl, entry, ua, dir);
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if (ret == H_SUCCESS)
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continue;
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if (ret == H_TOO_HARD)
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return ret;
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WARN_ON_ONCE_RM(1);
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kvmppc_rm_clear_tce(stit->tbl, entry);
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}
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kvmppc_tce_put(stt, entry, tce);
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return H_SUCCESS;
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}
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static long kvmppc_rm_ua_to_hpa(struct kvm_vcpu *vcpu,
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unsigned long ua, unsigned long *phpa)
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{
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pte_t *ptep, pte;
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unsigned shift = 0;
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ptep = __find_linux_pte_or_hugepte(vcpu->arch.pgdir, ua, NULL, &shift);
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if (!ptep || !pte_present(*ptep))
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return -ENXIO;
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pte = *ptep;
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if (!shift)
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shift = PAGE_SHIFT;
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/* Avoid handling anything potentially complicated in realmode */
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if (shift > PAGE_SHIFT)
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return -EAGAIN;
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if (!pte_young(pte))
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return -EAGAIN;
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*phpa = (pte_pfn(pte) << PAGE_SHIFT) | (ua & ((1ULL << shift) - 1)) |
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(ua & ~PAGE_MASK);
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return 0;
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}
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long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
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unsigned long liobn, unsigned long ioba,
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unsigned long tce_list, unsigned long npages)
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{
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struct kvmppc_spapr_tce_table *stt;
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long i, ret = H_SUCCESS;
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unsigned long tces, entry, ua = 0;
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unsigned long *rmap = NULL;
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bool prereg = false;
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struct kvmppc_spapr_tce_iommu_table *stit;
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/* For radix, we might be in virtual mode, so punt */
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if (kvm_is_radix(vcpu->kvm))
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return H_TOO_HARD;
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stt = kvmppc_find_table(vcpu->kvm, liobn);
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if (!stt)
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return H_TOO_HARD;
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entry = ioba >> stt->page_shift;
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/*
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* The spec says that the maximum size of the list is 512 TCEs
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* so the whole table addressed resides in 4K page
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*/
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if (npages > 512)
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return H_PARAMETER;
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if (tce_list & (SZ_4K - 1))
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return H_PARAMETER;
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ret = kvmppc_ioba_validate(stt, ioba, npages);
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if (ret != H_SUCCESS)
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return ret;
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if (mm_iommu_preregistered(vcpu->kvm->mm)) {
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/*
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* We get here if guest memory was pre-registered which
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* is normally VFIO case and gpa->hpa translation does not
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* depend on hpt.
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*/
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struct mm_iommu_table_group_mem_t *mem;
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if (kvmppc_gpa_to_ua(vcpu->kvm, tce_list, &ua, NULL))
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return H_TOO_HARD;
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mem = mm_iommu_lookup_rm(vcpu->kvm->mm, ua, IOMMU_PAGE_SIZE_4K);
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if (mem)
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prereg = mm_iommu_ua_to_hpa_rm(mem, ua, &tces) == 0;
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}
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if (!prereg) {
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/*
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* This is usually a case of a guest with emulated devices only
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* when TCE list is not in preregistered memory.
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* We do not require memory to be preregistered in this case
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* so lock rmap and do __find_linux_pte_or_hugepte().
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*/
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if (kvmppc_gpa_to_ua(vcpu->kvm, tce_list, &ua, &rmap))
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return H_TOO_HARD;
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rmap = (void *) vmalloc_to_phys(rmap);
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if (WARN_ON_ONCE_RM(!rmap))
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return H_HARDWARE;
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/*
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* Synchronize with the MMU notifier callbacks in
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* book3s_64_mmu_hv.c (kvm_unmap_hva_hv etc.).
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* While we have the rmap lock, code running on other CPUs
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* cannot finish unmapping the host real page that backs
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* this guest real page, so we are OK to access the host
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* real page.
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*/
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lock_rmap(rmap);
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if (kvmppc_rm_ua_to_hpa(vcpu, ua, &tces)) {
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ret = H_TOO_HARD;
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goto unlock_exit;
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}
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}
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for (i = 0; i < npages; ++i) {
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unsigned long tce = be64_to_cpu(((u64 *)tces)[i]);
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ret = kvmppc_tce_validate(stt, tce);
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if (ret != H_SUCCESS)
|
|
goto unlock_exit;
|
|
|
|
ua = 0;
|
|
if (kvmppc_gpa_to_ua(vcpu->kvm,
|
|
tce & ~(TCE_PCI_READ | TCE_PCI_WRITE),
|
|
&ua, NULL))
|
|
return H_PARAMETER;
|
|
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
|
ret = kvmppc_rm_tce_iommu_map(vcpu->kvm,
|
|
stit->tbl, entry + i, ua,
|
|
iommu_tce_direction(tce));
|
|
|
|
if (ret == H_SUCCESS)
|
|
continue;
|
|
|
|
if (ret == H_TOO_HARD)
|
|
goto unlock_exit;
|
|
|
|
WARN_ON_ONCE_RM(1);
|
|
kvmppc_rm_clear_tce(stit->tbl, entry);
|
|
}
|
|
|
|
kvmppc_tce_put(stt, entry + i, tce);
|
|
}
|
|
|
|
unlock_exit:
|
|
if (rmap)
|
|
unlock_rmap(rmap);
|
|
|
|
return ret;
|
|
}
|
|
|
|
long kvmppc_rm_h_stuff_tce(struct kvm_vcpu *vcpu,
|
|
unsigned long liobn, unsigned long ioba,
|
|
unsigned long tce_value, unsigned long npages)
|
|
{
|
|
struct kvmppc_spapr_tce_table *stt;
|
|
long i, ret;
|
|
struct kvmppc_spapr_tce_iommu_table *stit;
|
|
|
|
/* For radix, we might be in virtual mode, so punt */
|
|
if (kvm_is_radix(vcpu->kvm))
|
|
return H_TOO_HARD;
|
|
|
|
stt = kvmppc_find_table(vcpu->kvm, liobn);
|
|
if (!stt)
|
|
return H_TOO_HARD;
|
|
|
|
ret = kvmppc_ioba_validate(stt, ioba, npages);
|
|
if (ret != H_SUCCESS)
|
|
return ret;
|
|
|
|
/* Check permission bits only to allow userspace poison TCE for debug */
|
|
if (tce_value & (TCE_PCI_WRITE | TCE_PCI_READ))
|
|
return H_PARAMETER;
|
|
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
|
unsigned long entry = ioba >> stit->tbl->it_page_shift;
|
|
|
|
for (i = 0; i < npages; ++i) {
|
|
ret = kvmppc_rm_tce_iommu_unmap(vcpu->kvm,
|
|
stit->tbl, entry + i);
|
|
|
|
if (ret == H_SUCCESS)
|
|
continue;
|
|
|
|
if (ret == H_TOO_HARD)
|
|
return ret;
|
|
|
|
WARN_ON_ONCE_RM(1);
|
|
kvmppc_rm_clear_tce(stit->tbl, entry);
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift))
|
|
kvmppc_tce_put(stt, ioba >> stt->page_shift, tce_value);
|
|
|
|
return H_SUCCESS;
|
|
}
|
|
|
|
/* This can be called in either virtual mode or real mode */
|
|
long kvmppc_h_get_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
|
|
unsigned long ioba)
|
|
{
|
|
struct kvmppc_spapr_tce_table *stt;
|
|
long ret;
|
|
unsigned long idx;
|
|
struct page *page;
|
|
u64 *tbl;
|
|
|
|
stt = kvmppc_find_table(vcpu->kvm, liobn);
|
|
if (!stt)
|
|
return H_TOO_HARD;
|
|
|
|
ret = kvmppc_ioba_validate(stt, ioba, 1);
|
|
if (ret != H_SUCCESS)
|
|
return ret;
|
|
|
|
idx = (ioba >> stt->page_shift) - stt->offset;
|
|
page = stt->pages[idx / TCES_PER_PAGE];
|
|
tbl = (u64 *)page_address(page);
|
|
|
|
vcpu->arch.gpr[4] = tbl[idx % TCES_PER_PAGE];
|
|
|
|
return H_SUCCESS;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvmppc_h_get_tce);
|
|
|
|
#endif /* KVM_BOOK3S_HV_POSSIBLE */
|